Commit Graph

699 Commits

Author SHA1 Message Date
Jordan Carlin
c13c57b5a6
Refactor floating point testvector Makefile to split up RISCV and IEEE due to Make issues 2024-09-18 17:37:02 -07:00
Jordan Carlin
cb944e0f92
Remove old testfloat and replace references 2024-09-15 01:03:03 -07:00
Jordan Carlin
7e41961dd1
Remove old softfloat and replace references 2024-09-15 00:34:18 -07:00
Jordan Carlin
f7b93ac700
More simplification of fp testvector makefile 2024-09-14 20:59:00 -07:00
Jordan Carlin
d2ef362761
Fix testfloat cvtint generation 2024-09-14 20:16:28 -07:00
Jordan Carlin
ec8302d597
Split up cvtint and cvtfp tests 2024-09-14 20:11:09 -07:00
David Harris
6e0b0487dd Recreated coverage changes 2024-09-05 16:32:45 -07:00
David Harris
712274af3d Removed covergen makefile 2024-09-05 16:29:07 -07:00
David Harris
941d662b59 Removed covergen 2024-09-05 16:28:48 -07:00
naichewa
58be9e0556 Merge branch 'spi_debug' 2024-09-03 15:00:59 -07:00
naichewa
3b7661dfd5 SckDiv Zero bug fixes 2024-09-03 14:58:46 -07:00
David Harris
ff9f0fa140 Updated riscv-isac dependencies for security 2024-09-03 03:46:44 -07:00
Jacob Pease
3b91977227 Added start.s to spitest directory. 2024-08-28 04:10:24 -05:00
Jacob Pease
44ece7cb96 Added CVW header to spitest files. 2024-08-27 14:28:49 -05:00
Jacob Pease
b7a74307c5 Committing the custom test spitest. 2024-08-27 14:19:56 -05:00
Rose Thompson
6be30369f1 Merge branch 'main' of github.com:openhwgroup/cvw 2024-08-21 11:02:23 -07:00
Rose Thompson
faffecf891 Merge branch 'main' of github.com:openhwgroup/cvw 2024-08-21 11:02:17 -07:00
Rose Thompson
01b623b8c4 Merge branch 'main' of github.com:openhwgroup/cvw 2024-08-21 11:02:08 -07:00
Rose Thompson
f603d21826 Updated my name in multiple locations. 2024-08-21 10:50:39 -07:00
Huda-10xe
ca21b865b3 Adding regression commands to Makefile 2024-08-21 15:45:23 +05:00
Jacob Pease
baad4e0fd2 With Naiche's help, we fixed the SPI controllers clock polarity and phase settings. Added conditions to the SPI regression tests. 2024-08-20 16:24:37 -05:00
David Harris
f4871c14f7 Merge pull request #918 from jordancarlin/fp_tests_make
Testfloat vector generation refactoring + root Makefile cleanup
2024-08-17 04:32:45 -07:00
David Harris
ef7028154c Merge pull request #873 from Shreesh-Kulkarni/main
Modified riscv-isacov and riscv-ctg files to support some missing quad instructions.
2024-08-16 11:10:35 -07:00
Jordan Carlin
d6110c3d0b Set riscof jobs based on number of cores 2024-08-15 19:02:48 -07:00
Jordan Carlin
3b85f92695 Testfloat vector generation refactoring 2024-08-15 18:53:26 -07:00
Jordan Carlin
6d77398c95 Update linker scripts to avoid hardcoded /opt/riscv 2024-08-09 20:15:28 -07:00
Jordan Carlin
357175f1c8 Merge branch 'main' of https://github.com/openhwgroup/cvw into installation 2024-08-07 20:22:55 -07:00
Huda-10xe
2405b6c1e2 Adding RVVI Functional Coverage Support 2024-08-07 14:31:16 +05:00
Jordan Carlin
2f1a101735 Merge branch 'main' of https://github.com/openhwgroup/cvw into installation 2024-07-25 21:21:57 -07:00
David Harris
b7fb786749 Increased covergen.py functional coverage to 87.6% 2024-07-23 04:38:13 -07:00
David Harris
a9fd6e6cfb Added more RV64I coverage generation 2024-07-22 08:52:19 -07:00
David Harris
6ca7845c93 Fixed hazard and rd_maxval coverage generation 2024-07-21 19:46:30 -07:00
Shreesh-Kulkarni
82b42a5faf Modified riscv-isacov and riscv-ctg files to support some missing quad instructions. Needs debugging. 2024-07-06 08:57:32 -07:00
Jordan Carlin
e6e070f4e4 Update python shebangs to use /usr/bin/env python3 so virtual environment can be used (also aids in general portability) 2024-07-03 20:42:55 -07:00
Jordan Carlin
2b4f12916e
Merge pull request #858 from davidharrishmc/dev
Regression Improvements
2024-07-01 20:04:31 -07:00
James Stine
f660779ba9 Fix for Q causing it to error out - commented out line for ISA and reset-val so can be put back 2024-06-28 12:17:15 -05:00
David Harris
8fe2052b1f Fix derived configuration with new derivgen script 2024-06-26 16:09:59 -07:00
David Harris
21e5fa3103
Merge pull request #854 from Shreesh-Kulkarni/main
Files for Quad Precision Testing Support for Wally
2024-06-26 11:41:26 -07:00
Shreesh-Kulkarni
93fb0f2a84 Files for Quad Precision Testing Support for Wally 2024-06-26 11:36:04 -07:00
David Harris
0fcc7878dc Updated march lists 2024-06-25 21:54:58 -07:00
David Harris
d8d94eeafa
Merge pull request #808 from jordancarlin/main
Update riscv-arch-test
2024-06-20 08:43:41 -07:00
Ross Thompson
9e93f21990 Updated covergen to not include stores as they are incomplete.
Modified makefile riscv-dv to not simulation only generate tests.
2024-06-19 15:13:49 -07:00
Jordan Carlin
d58b454a8b
Finish switching Zfa to use riscv-arch-test 2024-06-18 23:31:37 -07:00
Jordan Carlin
6f79dca9c4
Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-05-27 12:29:24 -07:00
Quswar Abid
997b5901cc sb types are all passing, loaditypes are not! 2024-05-27 04:27:50 -07:00
Quswar Abid
1bf9b13953 added some sb types 2024-05-27 03:58:38 -07:00
Quswar Abid
29d7cd5663 unwanted comments 2024-05-27 03:58:38 -07:00
Quswar Abid
8edc4057ed compilable tests generating for loaditypes[lb, lh, lw, ld, lbu, lhu, lwu] 2024-05-27 03:58:38 -07:00
Jordan Carlin
dcafe4793e
Add froundnx and fround.d tests 2024-05-24 15:16:35 -07:00
Jordan Carlin
f410bbb79e
Use Zfa tests from riscv-arch-test instead of wally-riscv-arch-test 2024-05-21 00:04:27 -07:00