62 Commits

Author	SHA1	Message	Date
ushakya22	88060a74f5	- created new testbench file instead of having it at the bottom of the srt file ... - uses unpacker to parse 64 bit floating point numbers - updated testbench to read from new testvectors generated by exptestbench Notes: MEM_WIDTH updated to be 64*3 Input numbers and output result is 64 bit number MEM_SIZE set to 60000	2022-02-21 16:24:50 +00:00
ushakya22	d1089163a9	- Created exponent divsion module ... - top module includes exponent module now Notes: - may be a better implementation of the exponent module rather than having what I believe are two adders currently	2022-02-21 16:13:30 +00:00
ushakya22	c6bd51a707	Changed Makefile to compile exptestgen instead of testgen	2022-02-21 16:08:45 +00:00
ushakya22	08d997d68b	reverted srt_standford back to original file pre modifications by Udeema	2022-02-21 16:08:09 +00:00
ushakya22	1495f6ac70	verilator lint for srt	2022-02-21 16:05:43 +00:00
ushakya22	5b83ad0929	Created test vector generation file for exponent and mantissa division	2022-02-21 16:04:41 +00:00
David Harris	143eb0ae65	srt fixes	2022-02-14 18:40:27 +00:00
David Harris	3598e05998	srt batch files	2022-02-14 18:37:46 +00:00
ushakya22	df561f8550	work in progress exponent handling	2022-02-14 18:24:29 +00:00
ushakya22	a996a5e16c	Added unpacker into testbench for srt	2022-02-12 22:05:18 +00:00
David Harris	e3f6c398b5	Mixed C and assembly language test cases; SRT initial version passing tests	2022-01-13 21:45:54 +00:00
David Harris	115287adc8	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00