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Author SHA1 Message Date
DTowersM
aa8580b2dc new slim benchmarks/coremark directory now works on addins/coremark repo, removed old riscv-coremark directory 2022-07-07 23:11:02 +00:00
Katherine Parry
5dd07c76bd moved old divsqrt to unusedsrc 2022-07-07 16:09:56 -07:00
Katherine Parry
75a8cea4e4 srt divider merged into fpu 2022-07-07 16:01:33 -07:00
cturek
010ab2e90e Seventeen Square Root Tests 2022-07-07 22:48:46 +00:00
David Harris
425fec0f41 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-07 22:00:59 +00:00
Katherine Parry
c581fba4aa modified wally shared 2022-07-07 21:59:43 +00:00
David Harris
f865994ba1 fixing port errors 2022-07-07 21:57:10 +00:00
Katherine Parry
7771f7b3eb added load and store test 2022-07-07 21:48:51 +00:00
cturek
269884b672 Preprocessing for square root 2022-07-07 21:23:30 +00:00
David Harris
f2915129ab Preliminary SRAM integration 2022-07-07 19:56:20 +00:00
Madeleine Masser-Frye
c7b03978bf plot tuning, fo4 axis 2022-07-07 16:44:02 +00:00
David Harris
3aa68ecfe6 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-07 15:57:50 +00:00
Madeleine Masser-Frye
b883c3ad94 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-07 15:52:05 +00:00
Madeleine Masser-Frye
d06549b479 updated synth flow to prevent runs from writing over each other's configs 2022-07-07 15:52:01 +00:00
David Harris
bf5168873e Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-07 15:51:33 +00:00
Madeleine Masser-Frye
280c1ec368 set input delay when flop-driven, added run clock 2022-07-07 15:50:34 +00:00
slmnemo
261248538c sim-buildroot-batch now runs wally-pipelined-batch 
with option buildroot buildroot-no-trace to boot linux from step 0
 2022-07-06 18:06:43 -07:00
David Harris
8ae7139545 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-06 23:44:47 +00:00
DTowersM
5dfff900b1 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into HEAD 2022-07-06 23:44:27 +00:00
DTowersM
67c5d66209 added changes to the testbench and benchmarks/coremark to support running the addins directory without the fpu 2022-07-06 23:43:57 +00:00
David Harris
21fb120aac Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-06 23:43:05 +00:00
Ross Thompson
d716c25275 Fixed an issue with direct map cache's nextway logic. 
Also found a small error in the replacement policy.
 2022-07-06 18:34:30 -05:00
Madeleine Masser-Frye
ad29e19a27 fixed width mismatch for rv64 ieuadrM and readdatawordM 2022-07-06 22:39:35 +00:00
David Harris
e22d6a2f9a Removed Sky130 libraries 2022-07-06 13:50:11 +00:00
David Harris
529f48ed58 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-06 13:26:26 +00:00
David Harris
76302a8599 PLIC and UART passing tests on APB 2022-07-06 13:26:14 +00:00
slmnemo
4fa4aaa7af Resolved conflicts between different gpio files 2022-07-05 18:38:52 -07:00
slmnemo
6b2125ab0e Fixed discrepancies between GPIO tests and book and removed extra unused code from CLINT tests. 2022-07-05 18:21:17 -07:00
Madeleine Masser-Frye
52562c9190 new priority onehot module for better area/time 2022-07-06 00:08:59 +00:00
Madeleine Masser-Frye
b5454f3a55 took first match out of pmpadrdec 2022-07-06 00:02:01 +00:00
Madeleine Masser-Frye
d8ea12c6f4 fixed concatenation syntax 2022-07-05 22:36:54 +00:00
Madeleine Masser-Frye
3b73600932 organized ppa files into ppa directory 2022-07-05 22:28:25 +00:00
cturek
2faa8847f4 Radix 2 Integer division working (without signs or remainder) 2022-07-05 21:34:49 +00:00
David Harris
72e216d053 APB CLINT passing regression 2022-07-05 15:51:35 +00:00
David Harris
5f5ad77d4a Modified uncore to use AHB bridge to GPIO 2022-07-05 05:02:21 +00:00
David Harris
c8ac05ba7b AHB bridge for gpio 2022-07-05 05:01:59 +00:00
David Harris
ca95b46de5 Added reference to Schmookler01 for LOA 2022-07-05 05:01:12 +00:00
David Harris
1a356312b2 Added comments to PLIC about likely bug 2022-07-05 05:00:29 +00:00
David Harris
abfd935e06 removed delay in ahblite 2022-07-05 04:59:28 +00:00
David Harris
714a3fa962 Fixed typos in gpio test comments 2022-07-05 04:57:42 +00:00
David Harris
f5bdbbe219 Removed sig4 spurious message from testbench 2022-07-05 03:27:14 +00:00
David Harris
1bf701d958 Added check to halt testbench on failing to find file 2022-07-05 02:28:59 +00:00
Katherine Parry
28cdfcd1e8 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-07-03 21:41:13 -07:00
Katherine Parry
2fc795ca70 added missing files 2022-07-03 21:40:47 -07:00
David Harris
441faa2745 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-04 03:21:08 +00:00
David Harris
8612465756 fixed tininess detection in TestFloat examples, merged change in WALLY-TEST-LIB 2022-07-04 03:21:04 +00:00
Katherine Parry
8ac722f693 Renaming signals to match chapter 2022-07-03 12:26:22 -07:00
David Harris
0fa35acbc5 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-02 19:37:14 +00:00
David Harris
89b319aa1b FMA ZAligned name 2022-07-02 19:35:13 +00:00
slmnemo
0a774d9bf3 Fixed make error 2022-07-01 16:28:29 -07:00