Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity
10,011 Commits 5 Branches 2 Tags 53 MiB
b4447b393c
Commit Graph

10011 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Rose Thompson
4fe58fe036 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-10-23 16:14:30 -05:00
Rose Thompson
ea403e02ff Updated bpred-sim.py to take command line options to select between sweeping direction, target, class, or ras prediction. 2023-10-23 16:09:40 -05:00
Rose Thompson
694ec18934 Added support for branch counters when there is no branch predictor. 2023-10-23 15:32:03 -05:00
Rose Thompson
1611d5ec3c Fixed issue 250. instruction classification was not correct for jalr ra (non zero). 2023-10-23 15:30:43 -05:00
Rose Thompson
2aecf688f9 Addeed script to sweep sim_bp for btb. 2023-10-23 15:29:50 -05:00
David Harris
eba346849c Merge pull request #438 from ross144/main 
Fixed comments in cboz and cbom tests.
 2023-10-20 17:15:59 -07:00
Rose Thompson
0fd5b3b2ce Updated comments in the cboz tests. 2023-10-20 15:15:47 -05:00
Rose Thompson
0aea2c80b8 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-10-20 15:14:02 -05:00
Rose Thompson
5a4028064a Updated comments for the cbom tests. 2023-10-20 15:13:52 -05:00
Rose Thompson
d6dcec458d Merge pull request #437 from davidharrishmc/dev 
synth improvements
 2023-10-19 16:23:34 -05:00
David Harris
cbf0c01fd6 Set drive for Sky130 2023-10-19 13:46:30 -07:00
David Harris
6e7c0547a1 Modified log2 coding to avoid synthesis warning 2023-10-19 11:16:02 -07:00
Rose Thompson
a12fb6a338 Merge pull request #436 from davidharrishmc/dev 
Automatic generation of synthesis wrappers when needed
 2023-10-19 12:51:24 -05:00
David Harris
8f717c3254 Removed wrapper from wallySynth because it is automatic now 2023-10-19 10:49:06 -07:00
David Harris
348e74b8be Updated wrapper generation to be automatic without specifying WRAPPER=1; instead looks for cvw_t in the file. Also starting to add OSU 130 nm synthesis. 2023-10-19 10:44:03 -07:00
David Harris
7c1606264a Adjusted synthesis scripts to report on DESIGN even when a wrapper is used 2023-10-19 06:16:52 -07:00
Rose Thompson
83c354c4a1 Merge pull request #434 from davidharrishmc/dev 
Config and peripheral cleanup
 2023-10-18 17:58:29 -05:00
David Harris
4873b9c0a8 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-10-18 14:40:19 -07:00
David Harris
4469484f4a Merge pull request #435 from kipmacsaigoren/synth_wrapper_gen 
synth wrapper generation bug fix
 2023-10-18 14:34:37 -07:00
Kevin Kim
7b35da5245 wrapper bug fix 2023-10-18 14:29:46 -07:00
David Harris
48d42c1e7c Removed unnecessary RV64 PWDATA muxing from AHB peripherals because LSU already replicates 2023-10-18 05:50:41 -07:00
David Harris
b76c371e45 Config file cleanup 2023-10-18 05:38:36 -07:00
Jacob Pease
3e891ee635 Merge branch 'main' of github.com:openhwgroup/cvw 2023-10-17 14:13:28 -05:00
Jacob Pease
2b1c604016 Slight modification to testbench.sv 2023-10-17 14:13:18 -05:00
David Harris
c685837d08 Merge pull request #433 from ross144/main 
Reverted linux testbench to not check for match against QEMU.
 2023-10-17 11:13:11 -07:00
Rose Thompson
010fbf7319 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-10-17 10:01:35 -05:00
Rose Thompson
faea7db1b2 Reverted linux testbench to not check for match against QEMU. 2023-10-17 10:00:50 -05:00
naichewa
0ff9ce527d Merge branch 'main' into spi 2023-10-16 22:59:50 -07:00
naichewa
4941fe1769 sync fifo passes 2023-10-16 22:57:02 -07:00
Rose Thompson
6ae5934cd2 Merge pull request #431 from davidharrishmc/dev 
Dev
 2023-10-16 17:36:31 -05:00
David Harris
fab9fbd7f1 Merged testbench 2023-10-16 13:52:24 -07:00
David Harris
1a6e57f8c0 Renamed wally-config to config in many comments 2023-10-16 13:49:09 -07:00
David Harris
ac4216b43d Incorporated new AMO tests from riscv-arch-test 2023-10-16 10:25:45 -07:00
David Harris
6245748ed7 Added CSR permission tests for mconfigptr, menvcfg, mseccfg, etc. 2023-10-15 15:31:03 -07:00
David Harris
b4891d88db Added WALLY minfo test for rv32 2023-10-15 06:48:22 -07:00
David Harris
434d6b2c5c minfo test working again with mconfigptr for RV64 2023-10-15 06:41:52 -07:00
David Harris
4cab203900 Merge pull request #429 from ross144/main 
renamed imperas testbench to testbench-imperas.sv, fixed SDC timing bug
 2023-10-13 15:32:43 -07:00
naichewa
aa5abfc8e8 always working after reg bit swizzle changes 2023-10-13 14:22:32 -07:00
Rose Thompson
8f2ca2ae15 Added missing files. 2023-10-13 15:10:58 -05:00
Rose Thompson
8d4cdcbd1a Renamed testbench_imperas.sv to testbench-imperas.sv 2023-10-13 14:56:45 -05:00
Rose Thompson
c1d6fddea8 Removed P.FPGA from testbench. 2023-10-13 14:08:17 -05:00
Ross Thompson
c43377afff Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-10-13 13:44:19 -05:00
Ross Thompson
7ab2dc1447 Merge branch 'main' of github.com:ross144/cvw 2023-10-13 12:30:52 -05:00
Ross Thompson
4634756e20 Change to flash-sd.sh to fix relative path to device tree. 2023-10-13 12:30:21 -05:00
naichewa
f231c3d3a3 correct delay0, fmt register test entries 2023-10-12 15:13:23 -07:00
naichewa
d5d4f9d044 transferred spi changes in ECA-authorized commit 2023-10-12 13:36:57 -07:00
Ross Thompson
1a060d7efa Fixed bug with flash script. 2023-10-10 18:05:35 -05:00
Ross Thompson
d33c966a42 Changed SDC outputs to ensure they are aligned to the falling edge of the divided down clock rather than the processor clock. 2023-10-10 17:46:12 -05:00
Jacob Pease
03ea0a02e0 Merge branch 'main' of github.com:openhwgroup/cvw 2023-10-10 16:48:53 -05:00
David Harris
519d7ce664 Merge pull request #424 from ross144/main 
Fixed issue #412 The root cause was DTLB miss leads to page fault exception with concurrent I$ miss.  The HPTW hits all entries in the D$ and quickly faults.  However the I$ is still waiting on the main memory. The trap then interrupts the atomimicity of the bus fetch and breaks the next several instructions.
 2023-10-10 07:09:15 -07:00