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Author SHA1 Message Date
Kevin Kim
b09d942d60 removed Funct7 in Execute Stage 2023-02-17 16:12:09 -08:00
Kevin Kim
a1570a88c9 bmuctrl checks for illegal zbs-style instructions 2023-02-17 12:54:08 -08:00
Kevin Kim
370ff54875 bctrl bug fix 
- bctrl decodes shift immediate instructions properly
 2023-02-17 11:16:29 -08:00
Kevin Kim
aba4eb80d4 alu bug fix 
- condmaskb piped in correctly instead of b
 2023-02-17 11:02:07 -08:00
Kip Macsai-Goren
ea38e05773 fixed makefile for 32 bit arch tests, restored original make for all others 2023-02-17 09:57:56 -08:00
Kip Macsai-Goren
78067cc3d2 :Merge branch 'main' of github.com:kipmacsaigoren/cvw into main 2023-02-17 09:52:11 -08:00
Kip Macsai-Goren
7344f3ef30 Modified arch64 tests to remove floating point and double tests from hanging make 2023-02-17 09:51:55 -08:00
Kevin Kim
47f8fb3329 Merge branch 'main' of https://github.com/kipmacsaigoren/cvw into main 2023-02-17 09:51:53 -08:00
Kevin Kim
07eaf146c2 alu looks at BSelect, added BSelect one hot signal 2023-02-17 09:51:49 -08:00
Kip Macsai-Goren
a14551c858 merge with new changes to upstream 2023-02-17 09:36:58 -08:00
Kevin Kim
323d14f9d9 added alu changes to previous commit 2023-02-17 08:22:13 -08:00
Kevin Kim
44c9612a5c added BSelect Signal 
- BSelect [3:0] is a one hot encoding of if it's a ZBA_ZBB_ZBC_ZBS instruction
 2023-02-17 08:21:55 -08:00
Kevin Kim
ada6023a41 comments 2023-02-17 07:53:14 -08:00
Kevin Kim
ab542a5bc3 comments 2023-02-17 07:52:54 -08:00
Kevin Kim
290fcd1789 comment formatting 2023-02-17 07:51:28 -08:00
Kevin Kim
5b341ac3a7 alu handles ALU select instead of funct3 2023-02-17 07:51:10 -08:00
Kevin Kim
ff365de54a added BMU controll 2023-02-17 07:50:59 -08:00
Kevin Kim
f0c81247e4 Added ALUSelect signal into datapath, ieu, controller 2023-02-17 07:50:45 -08:00
Ross Thompson
51c1f17a2a Merge pull request #88 from stineje/main 
fix typo - remove extra p at end of script
 2023-02-16 15:53:39 -06:00
James Stine
3347aa7fe8 fix typo - remove extra p at end of script 2023-02-16 15:50:31 -06:00
Ross Thompson
907ed826c8 Merge pull request #87 from stineje/main 
Update bug in Makefile
 2023-02-16 15:25:43 -06:00
James Stine
8e9cf8f3e4 Update bug in Makefile 2023-02-16 15:16:32 -06:00
Ross Thompson
880008b836 Merge pull request #86 from stineje/main 
Get rid of extra CR/LF in .synopsys_dc.setup file
 2023-02-16 15:13:48 -06:00
James Stine
64eeb07c6b Get rid of extra CR/LF in .synopsys_dc.setup file 2023-02-16 15:01:52 -06:00
David Harris
6d43326cb9 Merge pull request #85 from stineje/main 
Fix bugs in scripts for synthesis and tsmc28 psyn
 2023-02-16 11:54:21 -08:00
James Stine
14c6cfb24d Fix bugs in scripts for synthesis and tsmc28 psyn 2023-02-16 13:38:26 -06:00
David Harris
e55eaa5545 Merge pull request #83 from stineje/main 
Update topo psyn stuff
 2023-02-16 06:34:59 -08:00
James Stine
9e83b0bfaf Update topo psyn stuff 2023-02-16 08:07:17 -06:00
Kevin Kim
921a32faf9 added comments to zbc units 2023-02-15 17:42:32 -08:00
Kevin Kim
50f0262498 zbc configurability and select mux 2023-02-15 17:39:37 -08:00
Kevin Kim
cd13913f07 controller forwards funct7 
- started the bmu controll register
 2023-02-15 17:38:12 -08:00
Kevin Kim
8feeaa5e94 zbc and carry-less multiply work properly 2023-02-15 17:37:09 -08:00
Ross Thompson
8d28524c35 Merge pull request #82 from stineje/main 
Update if-then-else for ram items
 2023-02-15 18:16:44 -06:00
James Stine
a3aeff2703 Update if-then-else for ram items 2023-02-15 18:12:12 -06:00
David Harris
abf3fbbebf Merge pull request #80 from ross144/main 
Branch predictor acuracy fixes caused by last two weeks optimazations"
 2023-02-15 09:39:26 -08:00
Kevin Kim
2eb8721843 continued ZBC integration into ALU 2023-02-15 09:35:07 -08:00
Ross Thompson
c6920ab08e Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-15 11:29:39 -06:00
Ross Thompson
9c7339694b Merge branch 'main' of github.com:ross144/cvw 2023-02-15 11:28:50 -06:00
Ross Thompson
3f91c11a08 Merge pull request #79 from eroom1966/add-coverage 
add files to support coverage
 2023-02-15 11:18:25 -06:00
Kevin Kim
2a58a86371 added ALUResult Signal 2023-02-15 09:13:10 -08:00
eroom1966
237a115377 add files to support coverage 2023-02-15 11:13:50 +00:00
Kevin Kim
27817c5b1d controller passes funct7 from decode to execute 2023-02-14 16:06:10 -08:00
Kevin Kim
857097282c git 2023-02-14 16:03:26 -08:00
Kevin Kim
420a0209dd Merge branch 'tmp' into main 2023-02-14 13:12:57 -08:00
Kevin Kim
7b7957594e removed unncessary stuff 2023-02-14 13:07:03 -08:00
Kevin Kim
1a209aac21 reverted back to I tests working 2023-02-14 13:06:31 -08:00
Ross Thompson
4d2d166b8f Merge pull request #77 from kevindkim723/patch-1 
fixed typo in LZC
 2023-02-14 13:20:55 -06:00
Kevin Kim
4fed8d9196 added critical rsync command to python script and builds I-ext tests 
-rsync copies the stuff from riscof_work to work/riscv-arch-test
-
 2023-02-14 10:40:29 -08:00
Kevin Kim
bcea347370 added ALU result select mux for B instructions 2023-02-13 17:38:00 -08:00
Kevin Kim
1364ac2a14 controller handles bclr 2023-02-13 16:57:05 -08:00