Ross Thompson
d1ea52f6ea
Added artya7 device tree.
2023-07-17 16:01:02 -05:00
Ross Thompson
6a2b752fc0
Updated arty a7 fpga top.
2023-07-17 15:55:57 -05:00
Ross Thompson
42e6364b3d
Merge branch 'main' of github.com:ross144/cvw
2023-07-17 15:52:27 -05:00
Ross Thompson
c82638774f
Updated the FPGA zero stage bootloader.
2023-07-17 15:52:13 -05:00
David Harris
3dde7c59a8
Merge pull request #363 from ross144/main
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Fixed over logging issue with icache and dcache loggers.
2023-07-15 06:19:11 -07:00
Ross Thompson
50bc679fef
Fixed bug with performance counters not tracking the correct number of requested icache and dcache memory operations.
2023-07-14 16:31:44 -05:00
Ross Thompson
59022099c7
Fixed the icache and dcache overlogging issue.
2023-07-14 15:47:05 -05:00
Jacob Pease
b3aaa87cba
Modified bootloader to access GUID partitions. SDC interrupt to PLIC.
...
Since writing an SD card image generation script, the bootloader
needed to be altered to access individual binaries from specific
partitions. A new file, gpt.c with it's header gpt.h, have been added
to the bootloader to facilitate this.
The SDC has been added to the device tree for the VCU108
board. Additionally the SDC interrupt signal was added to the PLIC
node in the device tree. The PLIC itself was modified to accept the
SDC interrupt signal.
2023-07-14 13:36:44 -05:00
harshinisrinath
8adfcebb4f
Merge branch 'main' of https://github.com/openhwgroup/cvw into main
2023-07-13 13:00:58 -07:00
Ross Thompson
141c1b9dfb
Somehow the Arty A7 device tree was missing.
2023-07-13 14:10:45 -05:00
Ross Thompson
da7c6d33cd
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-07-13 11:26:49 -05:00
Ross Thompson
f851245a95
Merge pull request #361 from davidharrishmc/dev
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Clean up privilege rs1 decoding and implement svinval as sfence.vma
2023-07-13 12:26:30 -04:00
David Harris
644afa16cd
Clean up privilege rs1 decoding and implement svinval as sfence.vma
2023-07-13 02:41:17 -07:00
David Harris
b65d43f59b
Merge pull request #360 from ross144/main
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Fixed the privilege decoder bug which prevented the fpga linux boot.
2023-07-13 01:40:28 -07:00
Ross Thompson
9533dee300
Got xcelium running wally, but it fails to actually preload the memories.
2023-07-12 13:56:57 -05:00
Ross Thompson
33d8e5687e
Merge branch 'main' of github.com:ross144/cvw
2023-07-11 15:09:07 -05:00
Ross Thompson
99073a70c0
Added wfi and interrupt to tracer.
2023-07-11 15:09:04 -05:00
Ross Thompson
625192d9a4
Merge branch 'main' of github.com:ross144/cvw into main
2023-07-11 15:08:26 -05:00
Ross Thompson
38f32805ae
Created separate temporary testbench for xcelium.
2023-07-11 15:07:33 -05:00
Ross Thompson
4653f8e704
Simplificaiton of function tracker.
2023-07-11 10:51:17 -05:00
Ross Thompson
4c4eb080ee
RTL changes for Xcelium.
2023-07-11 10:51:02 -05:00
Ross Thompson
12beada55b
Fixed the privilege decoder bug which prevented the fpga linux boot.
2023-07-10 17:00:06 -05:00
Ross Thompson
beaec570c7
Merge pull request #359 from davidharrishmc/dev
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CSR updates
2023-07-10 13:16:57 -04:00
David Harris
e713ba8d3e
MENVCFG only exists if U_SUPPORTED
2023-07-09 18:25:07 -07:00
David Harris
4faf7c2ac6
Merge pull request #358 from ross144/main
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Fixes the FPGA linux boot after parameterization. Note commit 15314a9c
2023-07-07 17:09:57 -07:00
Ross Thompson
27f6f00402
Changes for xcelium.
2023-07-07 18:22:28 -05:00
Ross Thompson
9a49ec0b98
Removed duplicate signal name from testbench.
2023-07-07 16:34:08 -05:00
Ross Thompson
cb22463763
Fixed slight bug in config from parameterization.
2023-07-07 16:33:34 -05:00
Ross Thompson
235546fa06
Merge branch 'main' of github.com:ross144/cvw
2023-07-07 13:25:00 -05:00
Ross Thompson
cdf73d3b51
Updated comments.
2023-07-06 15:24:26 -05:00
Ross Thompson
e4555dc4af
Removed unused parameter.
2023-07-06 14:57:07 -05:00
Ross Thompson
2ce8b66574
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-07-06 14:55:43 -05:00
David Harris
369e8fb5ec
Removed outdated commment about endianness
2023-07-06 12:41:46 -07:00
David Harris
869a7cb827
Removed MTINST, which is not used in a system without a hypervisor
2023-07-06 12:40:53 -07:00
Ross Thompson
a963e50e88
It's a bit hacky, but the plic now passes the regression test and should be compatible with the fpga.
2023-07-06 14:07:37 -05:00
Ross Thompson
df56ff73c0
This is at least functionally correct, but has verilator lint issues.
2023-07-06 11:53:34 -05:00
Ross Thompson
c000366d3e
closer, but the wally32/64priv tests are failing.
2023-07-05 17:47:38 -05:00
Ross Thompson
98147e116a
Partially solved fpga boot.
2023-07-05 17:30:55 -05:00
Ross Thompson
6a2eca5657
Merge pull request #355 from davidharrishmc/dev
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Decoder improvements
2023-07-05 00:08:49 -04:00
David Harris
269bb688ea
Fixed comment typo
2023-07-04 11:34:58 -07:00
David Harris
b04763bcf2
Commented SVADU requirements for wally32priv mmu tests
2023-07-04 11:34:07 -07:00
David Harris
410ef01627
fixed spacing in fdivsqrt
2023-07-04 11:27:36 -07:00
David Harris
001d3cfdc5
Added logic to warn about x in memory reads. Added cbo instruction names to testbench decoder
2023-07-02 13:29:27 -07:00
David Harris
afe66d0ee4
Added prefetch instructions; sent cbo instructions to LSU
2023-07-02 10:55:35 -07:00
David Harris
723b8266cb
Added prefetch signals
2023-07-02 10:06:58 -07:00
David Harris
482e4e6e92
Enhanced decoder to produce individual CMOpE output for the 4 CMO instructions
2023-07-02 09:35:05 -07:00
David Harris
c48283801a
Fixed csr typos
2023-07-02 02:01:40 -07:00
David Harris
61208e486c
Fixed ENVCFG to reply on both MENVCFG and SENVCFG when in user mode
2023-07-02 02:00:27 -07:00
David Harris
b6ae5661b4
Added environment configuration control (menvcfg/senvcfg) of cbo instructions
2023-07-02 01:52:25 -07:00
David Harris
15314a9c9a
Gated floating-point load/stores with STATUS_FS and added initial decoding for Cache Management Operations
2023-07-02 00:34:30 -07:00
