1012 Commits

Author	SHA1	Message	Date
David Harris	9fd772ce83	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-18 23:11:12 +00:00
Katherine Parry	cce5fb8dfd	moved Ss to execute stage	2022-07-18 20:48:56 +00:00
Katherine Parry	7268b4b334	removed underflow from inexactct calculation	2022-07-18 17:51:18 +00:00
Katherine Parry	d6f1fc12db	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-18 17:31:29 +00:00
Katherine Parry	0210718f19	renamed signals in ocde to match book	2022-07-18 17:31:17 +00:00
David Harris	03f573351a	Rewrote convert shift calculation with always for ease of reading	2022-07-17 16:40:58 +00:00
David Harris	622773343f	restored intPending logic to be sticky for PLIC	2022-07-16 17:43:31 -07:00
Katherine Parry	e3ed40620c	forgot some files	2022-07-15 21:42:45 +00:00
Katherine Parry	304c81eb17	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-15 20:17:08 +00:00
Katherine Parry	5cb9c9f319	merged floating-point radix-2 divider with radix-4	2022-07-15 20:16:59 +00:00
cturek	8c57eca262	Square root radix 2 working, does not work with division	2022-07-14 22:52:09 +00:00
cturek	2f96989aab	Square root	2022-07-14 21:19:45 +00:00
cturek	cabd41a5a0	Six tests passing and a bunch of sizizing issues fixed	2022-07-14 19:38:27 +00:00
Katherine Parry	83cc429700	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-14 18:16:13 +00:00
Katherine Parry	2fe8b6e34c	fixed error in divsqrt	2022-07-14 18:16:00 +00:00
cturek	8f7ffc3f29	S and SM are updating but are not correct yet	2022-07-14 00:39:30 +00:00
Katherine Parry	66bef379cb	renamed a file to fit diagram	2022-07-13 23:44:54 +00:00
cturek	0b91e7526f	DIVLEN and counter updated for sqrt computation and rounding	2022-07-13 22:42:39 +00:00
Katherine Parry	3dcddf8453	some code cleanup	2022-07-13 15:28:22 -07:00
Katherine Parry	b874c5c05d	removed minus 1 case in rounding	2022-07-13 15:01:38 -07:00
cturek	97a1548356	radix 4 files removed from srt and divlen modified for sqrt	2022-07-13 19:46:48 +00:00
cturek	b1906399aa	Lint error fixed and added comments to preprocessing	2022-07-13 19:34:04 +00:00
cturek	5975d0d470	Testbench accepts standard test vector files	2022-07-13 18:30:18 +00:00
cturek	3ed6b8d1ff	Test generation files in common format	2022-07-13 18:11:13 +00:00
cturek	120994b42b	Finalized sqrt, ready for debugging	2022-07-13 17:56:23 +00:00
cturek	6e96ca2c9b	Added adder input selection to on the fly converter	2022-07-13 17:47:27 +00:00
cturek	e9ce71ca20	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-13 17:36:56 +00:00
Katherine Parry	b45b3baec2	removed the +1 in the cvt	2022-07-13 09:41:35 -07:00
Katherine Parry	3c1bea1104	removed warnings and took a mux out of the critical path	2022-07-12 18:32:17 -07:00
cturek	8d5081e8e9	little fix	2022-07-12 23:04:33 +00:00
cturek	b505ef135d	Square root implemented	2022-07-12 22:45:54 +00:00
Katherine Parry	12a54161c0	found the bug in the store modification	2022-07-12 22:42:19 +00:00
Katherine Parry	18d7fee541	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-12 22:37:20 +00:00
cturek	8edf44063a	C register and other various fixes	2022-07-12 22:18:56 +00:00
cturek	c60991f2bf	On the fly conversion for square root	2022-07-12 02:21:38 +00:00
Katherine Parry	1267d33d3c	forgot a file	2022-07-11 18:31:51 -07:00
Katherine Parry	ba339fc794	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-07-11 18:30:29 -07:00
Katherine Parry	bea4ec078d	variable interations implemented in radix-4 divider	2022-07-11 18:30:21 -07:00
DTowersM	fe7d03a3da	added some preliminary support for coremark XLEN=32, made sure rv64 not impacted	2022-07-11 21:13:09 +00:00
David Harris	03a20610aa	added comment about checking SRAM size	2022-07-10 12:48:51 +00:00
David Harris	d1a7832dd9	added comment about RAMs in cacheway	2022-07-10 12:47:34 +00:00
Katherine Parry	62205ebb3b	renamed FLoad2 to FStore2	2022-07-09 00:26:45 +00:00
Katherine Parry	97e7e619d9	moved fpu ieu write data mux to lsu	2022-07-08 23:56:57 +00:00
cturek	0dc30a0acf	F Selection	2022-07-08 21:53:52 +00:00
Katherine Parry	c56fdd7e0f	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-07-08 12:30:50 -07:00
Katherine Parry	88b4f9b40a	renamed signals in cvt and prostproc	2022-07-08 12:30:43 -07:00
James Stine	99fed5d59f	Update SRAM to /proj/wally	2022-07-08 08:09:55 -05:00
David Harris	8be1dafbd6	Removed testbench code that ignores mismatch on zero signatures	2022-07-08 09:17:31 +00:00
David Harris	87ea95e6c5	erge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-08 09:09:07 +00:00
David Harris	5ae88dbef0	Moved HWSTRB to ahblite, factored out of peripherals. Moved old AHB peripherals to unusedsrc	2022-07-08 09:09:02 +00:00