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Author SHA1 Message Date
cturek
8f7ffc3f29 S and SM are updating but are not correct yet 2022-07-14 00:39:30 +00:00
Katherine Parry
ac2ad1d60a fixed uncommented line in makefile 2022-07-14 00:01:07 +00:00
Katherine Parry
66bef379cb renamed a file to fit diagram 2022-07-13 23:44:54 +00:00
cturek
0b91e7526f DIVLEN and counter updated for sqrt computation and rounding 2022-07-13 22:42:39 +00:00
Katherine Parry
3dcddf8453 some code cleanup 2022-07-13 15:28:22 -07:00
Katherine Parry
b874c5c05d removed minus 1 case in rounding 2022-07-13 15:01:38 -07:00
cturek
97a1548356 radix 4 files removed from srt and divlen modified for sqrt 2022-07-13 19:46:48 +00:00
cturek
b1906399aa Lint error fixed and added comments to preprocessing 2022-07-13 19:34:04 +00:00
cturek
5975d0d470 Testbench accepts standard test vector files 2022-07-13 18:30:18 +00:00
cturek
3ed6b8d1ff Test generation files in common format 2022-07-13 18:11:13 +00:00
cturek
120994b42b Finalized sqrt, ready for debugging 2022-07-13 17:56:23 +00:00
cturek
6e96ca2c9b Added adder input selection to on the fly converter 2022-07-13 17:47:27 +00:00
cturek
e9ce71ca20 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-13 17:36:56 +00:00
Katherine Parry
b45b3baec2 removed the +1 in the cvt 2022-07-13 09:41:35 -07:00
Katherine Parry
3c1bea1104 removed warnings and took a mux out of the critical path 2022-07-12 18:32:17 -07:00
cturek
8d5081e8e9 little fix 2022-07-12 23:04:33 +00:00
cturek
b505ef135d Square root implemented 2022-07-12 22:45:54 +00:00
Katherine Parry
12a54161c0 found the bug in the store modification 2022-07-12 22:42:19 +00:00
Katherine Parry
18d7fee541 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-12 22:37:20 +00:00
cturek
8edf44063a C register and other various fixes 2022-07-12 22:18:56 +00:00
cturek
c60991f2bf On the fly conversion for square root 2022-07-12 02:21:38 +00:00
Katherine Parry
1267d33d3c forgot a file 2022-07-11 18:31:51 -07:00
Katherine Parry
ba339fc794 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-07-11 18:30:29 -07:00
Katherine Parry
bea4ec078d variable interations implemented in radix-4 divider 2022-07-11 18:30:21 -07:00
DTowersM
fe7d03a3da added some preliminary support for coremark XLEN=32, made sure rv64 not impacted 2022-07-11 21:13:09 +00:00
DTowersM
cd2e32bcba switched coremark to 10 iterations 2022-07-11 17:20:38 +00:00
David Harris
03a20610aa added comment about checking SRAM size 2022-07-10 12:48:51 +00:00
David Harris
d1a7832dd9 added comment about RAMs in cacheway 2022-07-10 12:47:34 +00:00
David Harris
f6a22e19b6 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-10 03:18:30 +00:00
Madeleine Masser-Frye
9bb01bc6f4 improved command line synth functionality 2022-07-09 04:51:23 +00:00
Madeleine Masser-Frye
e33ab9e515 explanations and modifications for general ppa use 2022-07-09 03:24:47 +00:00
Madeleine Masser-Frye
6f42b88d73 syntheses now write alib in their own directories 2022-07-09 02:40:41 +00:00
Katherine Parry
62205ebb3b renamed FLoad2 to FStore2 2022-07-09 00:26:45 +00:00
Katherine Parry
97e7e619d9 moved fpu ieu write data mux to lsu 2022-07-08 23:56:57 +00:00
Madeleine Masser-Frye
5e6fcb6ea0 remove outdated scripts 2022-07-08 22:52:53 +00:00
Madeleine Masser-Frye
7517befbdd tweaks to run synth without error 2022-07-08 22:52:10 +00:00
Madeleine Masser-Frye
8004712c75 cleaned up old commands and commented 2022-07-08 22:39:53 +00:00
Madeleine Masser-Frye
6f5ff93169 condensed cleanup, changed bpred_size to 4, moved synth hdl into own directory 2022-07-08 22:29:18 +00:00
Madeleine Masser-Frye
19b4d51d9c told dc to look in synth directory for hdl and WORK 2022-07-08 22:16:34 +00:00
David Harris
4f8f154ad6 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-08 22:00:53 +00:00
David Harris
42e18e9a21 CoreMark makefile and printing improvements 2022-07-08 22:00:50 +00:00
cturek
0dc30a0acf F Selection 2022-07-08 21:53:52 +00:00
DTowersM
5c14c97e49 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into HEAD 2022-07-08 21:25:58 +00:00
DTowersM
55e1bd6c77 added PORT_CFLAGS and some WIP 32bit support 2022-07-08 21:25:52 +00:00
Madeleine Masser-Frye
c4c6512c7f Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-08 20:42:04 +00:00
Madeleine Masser-Frye
510b3f33cb made parallel synthesis in python command line based 2022-07-08 20:41:59 +00:00
Katherine Parry
c56fdd7e0f Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-07-08 12:30:50 -07:00
Katherine Parry
88b4f9b40a renamed signals in cvt and prostproc 2022-07-08 12:30:43 -07:00
James Stine
99fed5d59f Update SRAM to /proj/wally 2022-07-08 08:09:55 -05:00
slmnemo
e190aeb14b Fixed error in gpio test 2022-07-08 02:27:16 -07:00