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5,272 Commits 5 Branches 2 Tags 53 MiB
8b6aad27c7
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94 Commits

Author SHA1 Message Date
Kevin Kim
8b6aad27c7 Started count instructions 2023-02-04 20:01:41 +00:00
Kevin Kim
d47a44a62f ALU changes (ZBB) 
- handles inverted operand instructions
- handles shift-and-add instructions
 2023-02-03 16:00:32 +00:00
Kevin Kim
f0730c13e2 Started Zbb 
-Performs byte instructions (orc.b, rev8 (32/64))
 2023-02-03 05:40:38 +00:00
Kevin Kim
a0ea436b9c zbs minor lint fix 2023-02-03 05:31:50 +00:00
Kevin Kim
44e5a7e913 zbc initial done; passes lint. 
clmul logic changes have not verified yet
 2023-02-03 04:48:23 +00:00
Kevin Kim
adc96ecaaa added bit reverse module, passes lint 2023-02-02 23:10:57 +00:00
Kevin Kim
e2228f6341 started zbc 2023-02-02 20:11:11 +00:00
Kevin Kim
aadc1de746 zbs passes lint 2023-02-02 20:04:38 +00:00
Kevin Kim
ae5d7844a9 clmul finished initial hdl; passes lint 2023-02-02 19:49:14 +00:00
Kevin Kim
f07ffbb63b continued clmul unit 2023-02-02 18:54:33 +00:00
Kevin Kim
bd8f0189ee started clmul 2023-02-02 16:40:58 +00:00
Kip Macsai-Goren
f126d1e0ef added beginning of a ZBS instruction module to the ALU. Control signals still needed 2023-02-01 21:31:25 -08:00
David Harris
b89fe9989e Renamed DCACHE to DCACHE_SUPPORTED and ICACHE to ICACHE_SUPPORTED 2023-01-28 18:52:00 -08:00
David Harris
c2ce2947f9 Removed unused BMU, added CVW configuration 2023-01-27 15:47:15 -08:00
Ross Thompson
07308e2c14 Removed mark_debug from all source code. 2023-01-20 18:47:36 -06:00
David Harris
0f68fccf82 Started adding bit manipulation unit 2023-01-20 14:19:07 -08:00
David Harris
032332ebae renamed comparator module 2023-01-20 10:13:47 -08:00
David Harris
aed6f79d1e Removed study versions from comparator 2023-01-19 15:13:35 -08:00
sarah-harris
75038c279d Minor fixes in datapath.sv and ieu.sv (comments, putting signals in correct grouping) 2023-01-18 07:26:08 -08:00
David Harris
4a01ebd4d9 IEU comment cleanup 2023-01-17 10:51:44 -08:00
David Harris
e0dbbb60c9 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-17 06:47:06 -08:00
David Harris
cd281996a0 IEU signal comment cleanup 2023-01-17 06:47:02 -08:00
sarah-harris
9fb7c8132a Changing signal name to ImmExtD/E to match figures 
Changing signal name:
ExtImmD/E -> ImmExtD/E

to match figures.
 2023-01-17 06:33:58 -08:00
David Harris
2c00ac5254 pipelined/src/ieu/ieu.sv 2023-01-17 06:08:26 -08:00
sarah-harris
3124ebc3e1 IEU cleanup 
IEU cleanup
 2023-01-17 06:02:26 -08:00
David Harris
e67f125201 Header comments 2023-01-12 04:35:44 -08:00
Ross Thompson
2f3bf9eaf5 Improved LSU formating. 2023-01-11 18:52:46 -06:00
sarah-harris
829ab2c9aa Added Sarah.Harris@unlv.edu to alu.sv 
Added Sarah.Harris@unlv.edu to alu.sv
 2023-01-11 15:20:41 -08:00
David Harris
7d93659f6b changed name to CORE-V-WALLY 2023-01-11 15:15:08 -08:00
David Harris
b911056e66 Changed Wally to CORE-V Wally 2023-01-11 14:03:44 -08:00
David Harris
19f0eb2aa1 Rename FP and FPU to F in signal names 2023-01-11 11:46:36 -08:00
David Harris
e6f110b953 Replaced MDUE with IntDivE in FDIVSQRT 2023-01-11 11:06:37 -08:00
David Harris
e92cffbb5e Changed MIT license to Solderpad License 2023-01-10 11:35:20 -08:00
David Harris
0a011f4548 Remove unused signals 2023-01-07 05:46:22 -08:00
David Harris
6d22c73676 Branch logic simplification and remove unused signals 2023-01-07 05:42:34 -08:00
David Harris
499b52a7f0 Handle special case Int Div/Rem of |A| < |B| in a single cycle 2023-01-01 13:54:01 -08:00
David Harris
921b5582da ALU cleanup 2022-12-24 07:18:35 -08:00
Ross Thompson
c8a0e7685a DON'T USE. First commit in attempt to move fpustall detection into the decode stage. 2022-12-23 12:47:18 -06:00
Ross Thompson
30dd86d146 Removed unnecessary stall when MatchDE was driven 1 by RdE == 0. 2022-12-23 11:45:42 -06:00
David Harris
07dc11a508 IFU mux for CSRWriteFenceM conditional on ZICSR/ZIFENCEI 2022-12-20 15:38:30 -08:00
Ross Thompson
b4bdf446cc Implement FENCE.I as NOP when ZIFENCEI is not supported. 2022-12-20 17:34:11 -06:00
Ross Thompson
c253b882be Reworked the hazards to eliminate StallFCause. Flush and CSRWrites now flush F,D,E stages and set the correct PCNextF in the M stage. 2022-12-15 09:53:35 -06:00
David Harris
e80e84aace Added IDIV_ON_FPU flag to control whether integer division uses FPU 2022-12-15 06:37:55 -08:00
David Harris
643a2e7cf9 Use FPU divider for integer division when F is supported 2022-12-14 17:03:13 -08:00
David Harris
3a07d56d33 Renamed FPUStallD to FCvtIntStallD 2022-12-02 11:55:23 -08:00
David Harris
46680b80a7 Eliminated store after store stall when no cache; simplified divshiftcalc logic. 2022-09-21 13:02:34 -07:00
Ross Thompson
51adf6cba9 Modified the lsu/ifu memory configurations. 2022-08-24 12:35:15 -05:00
David Harris
d72068d582 Only stall FPU to IEU on convert instructions with dependencies 2022-08-23 12:57:18 -07:00
David Harris
05aa18fe14 Cleaned up fcvt selection control to IEU and FPUIllegalInst signals 2022-08-23 12:17:19 -07:00
David Harris
d19fc99bf0 Simplify IEU-FP datapath 2022-08-23 11:16:36 -07:00