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zbc initial done; passes lint.

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clmul logic changes have not verified yet
This commit is contained in:
Kevin Kim 2023-02-03 04:48:23 +00:00
parent adc96ecaaa
commit 44e5a7e913
2 changed files with 47 additions and 11 deletions
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11
pipelined/src/ieu/clmul.sv
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@ -31,23 +31,22 @@
module clmul #(parameter WIDTH=32) (
input logic [WIDTH-1:0] A, B, // Operands
output logic [WIDTH-1:0] Result); // ZBS result
output logic [WIDTH-1:0] ClmulResult); // ZBS result
logic [WIDTH-1:0] pp [WIDTH-1:0]; //partial AND products
logic [WIDTH-1:0] sop; //sum of partial products
genvar i,j;
for (i=1; i<WIDTH;i+=WIDTH) begin:outer //loop fills partial product array
for (j=0;j<i;j++) begin: inner
for (i=1; i<WIDTH;i++) begin:outer //loop fills partial product array
for (j=0;j<=i;j++) begin: inner
assign pp[i][j] = A[i]&B[j];
end
end
for (i=1;i<WIDTH;i++) begin:xortree
assign result[i] = ^pp[i][i:0];
assign result[i] = ^pp[i:0][i];
end
assign result[0] = A[0]&B[0];
assign ClmulResult[0] = A[0]&B[0];
endmodule

47
pipelined/src/ieu/zbc.sv
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@ -29,13 +29,50 @@
`include "wally-config.vh"
module zbs #(parameter WIDTH=32) (
module zbc #(parameter WIDTH=32) (
input logic [WIDTH-1:0] A, B, // Operands
//input logic [2:0] ALUControl, // With Funct3, indicates operation to perform
input logic [6:0] Funct7,
input logic [2:0] Funct3, // With ***Control, indicates operation to perform
output logic [WIDTH-1:0] ZBCResult); // ZBC result
input logic [2:0] Funct3, // Indicates operation to perform
output logic [WIDTH-1:0] ZBCResult); // ZBC result
logic [WIDTH-1:0] ClmulResult, RevClmulResult;
logic [WIDTH-1:0] RevA, RevB;
logic [WIDTH-1:0] X,Y;
genvar i;
bitreverse brA(.a(A), .b(RevA));
bitreverse brB(.a(B), .b(RevB));
//NOTE: Is it better to mux in input to a SINGLE clmul or to instantiate 3 clmul and MUX the result?
//current implementation CP goes MUX -> CLMUL -> MUX -> RESULT
//alternate could have CLMUL * 3 -> MUX -> MUX
always_comb begin
casez (Funct3)
3'b001: begin //clmul
X = A;
Y = B;
end
3'b011: begin //clmulh
X = {RevA[WIDTH-2:0], {1'b0}};
Y = {{1'b0}, RevB[WIDTH-2:0]};
end
3'b010: begin //clmulr
X = {A[WIDTH-2:0], {1'b0}};
Y = B;
end
default: begin
X = 0;
Y = 0;
end
endcase
end
clmul clm(.A(X), .B(Y), .ClmulResult(ClmulResult));
bitreverse brClmulResult(.a(ClmulResult), .b(RevClmulResult));
assign ZBCResult = (Funct3 == 3'b011) ? RevClmulResult : ClmulResult;
endmodule