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Author SHA1 Message Date
Rose Thompson
74238defc3 Progress. 2023-12-18 20:23:19 -06:00
Rose Thompson
1e1759c258 Restored the one hack change which prevents verilator from working. 2023-12-18 17:00:53 -06:00
Rose Thompson
408bb2c35b Yay! I got verilator to compile our testbench! Does it actually work I don't know. 2023-12-18 16:44:34 -06:00
Rose Thompson
0f7b6ada04 Cleanup. 
Verilator still has issues with riscassertions.sv and the testbench
 2023-12-18 16:38:56 -06:00
Rose Thompson
b7b245fe2f functionName.sv is now linting for rv64gc. 2023-12-18 16:37:26 -06:00
Rose Thompson
c1ac153a4f Closer to verilator support. 2023-12-18 16:26:56 -06:00
Rose Thompson
58942b246b Kind of a frustrating set of changes to get the verilator errors out of the copyShadow module. 2023-12-18 13:34:14 -06:00
Rose Thompson
4a3cc8b9c8 More progress towards verilator. 2023-12-18 13:26:43 -06:00
Rose Thompson
5062a8c89c Added parameter for cache's SRAM length. 
Progress towards verilator support.
 2023-12-18 12:50:49 -06:00
Rose Thompson
1d36ce3328 Fixed lint issue. 2023-12-18 12:03:54 -06:00
Rose Thompson
7693c5d4e2 Updates to fpga top level. 2023-12-15 15:32:05 -06:00
Rose Thompson
26cd22c388 Replaced fpga's verilog top with system verilog. 2023-12-15 13:42:52 -06:00
Rose Thompson
dab9d7ab3c Replaced fpga top level verilog with system verilog. 2023-12-15 13:07:08 -06:00
Rose Thompson
57f163f103 Merge branch 'main' of github.com:ross144/cvw 2023-12-15 11:59:17 -06:00
Rose Thompson
438451ee02 Fixed the AMO hazard. 2023-12-15 11:55:54 -06:00
Rose Thompson
34631c54d3 Get's the fpga building again after the git history rewrite. 2023-12-14 17:08:25 -06:00
Rose Thompson
1ca9a8be6d I think I solved the AMO/store hazard issue introduced by removing the store delay hazard. 2023-12-14 16:31:02 -06:00
Rose Thompson
bb712d6860 Updated wavefile. 2023-12-14 14:36:23 -06:00
Rose Thompson
a7f0aaa722 Added comments to finish store delay stall removal. 2023-12-13 20:35:13 -06:00
Rose Thompson
9cf6b1fdeb Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-12-13 20:34:35 -06:00
Rose Thompson
9f4c32d49c Merge branch 'main' of github.com:ross144/cvw 2023-12-13 20:32:59 -06:00
Rose Thompson
b69a5b59cd DTIM works without the store delay stall. Still a bit of work remaining. The DTIM needs cleanup. 
The cache needs a bit of clean up and the chapter needs updates.
The controller needs to be updated to remove the store delay hazard for cmo instructions.
 2023-12-13 20:32:14 -06:00
Rose Thompson
e089b421bb Got it working for the cache. 2023-12-13 20:24:46 -06:00
Rose Thompson
f592baa741 Closer. 2023-12-13 18:15:32 -06:00
Rose Thompson
eeced05f33 More progress towards store delay reduction. 2023-12-13 15:56:29 -06:00
Rose Thompson
f3d43a7713 Progress on reducing store stall in d cache. 2023-12-13 15:34:21 -06:00
Rose Thompson
460a06be5b
Merge pull request #525 from davidharrishmc/dev 
Rolled back Verilator changes
 2023-12-13 12:54:49 -08:00
David Harris
ff26baf7e8 Rolled back attempt to support Verilator 2023-12-13 12:53:44 -08:00
Rose Thompson
9b7c47caa4
Merge pull request #524 from davidharrishmc/main 
Renamed HADE to ADUE for Svadu
 2023-12-13 11:53:38 -08:00
David Harris
333e390f8d Test commit from dev 2023-12-13 11:52:21 -08:00
David Harris
6c017141c5 Renamed HADE to ADUE for Svadu 2023-12-13 11:49:04 -08:00
Rose Thompson
f78304eaff
Merge pull request #523 from davidharrishmc/main 
Fixed Linux makefile; load branch predictor RAMs at startup for sim; …
 2023-12-13 11:36:09 -08:00
David Harris
aff61ea97a Fixed Linux makefile; load branch predictor RAMs at startup for sim; fixed comment in trap; starting to make testbench more compatible with Verilator 2023-12-13 11:33:59 -08:00
David Harris
f64f4c638a
Merge pull request #522 from ross144/main 
Cleaned up PC reset logic
 2023-12-13 11:21:22 -08:00
Rose Thompson
3d0f9ce4f3 Cleaned up comments about pc reset. 2023-12-13 13:06:33 -06:00
Rose Thompson
c98c0dd3e0 Removed unnecessary pc reset logic from ifu and btb. 2023-12-13 13:05:10 -06:00
Rose Thompson
13bb5d845b On the way to solving the store delay hazard. 2023-12-13 10:39:01 -06:00
David Harris
c6ed08ce12 Merge pull request #519 from ross144/main 
Replaced the git@github with hptts:github submodule for ahbsdc which I hope will fix Lee's clone issue
 2023-12-12 09:05:09 -08:00
Rose Thompson
e38b43ae73 Replaced the git@github with hptts:github submodule for ahbsdc which I hope will fix Lee's clone issue 2023-12-11 14:12:38 -06:00
Rose Thompson
14148933a3 Merge pull request #516 from davidharrishmc/dev 
Imperas Testbench fix for SPI
 2023-12-07 10:29:19 -08:00
David Harris
b268a3b9d3 Added SPI support to Imperas testbenches 2023-12-07 09:44:31 -08:00
David Harris
eecc63772d Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-12-06 07:26:41 -08:00
David Harris
0f0b4b0c1c Added make wally-riscv-arch-test to tests/riscof to only build custom tests 2023-12-06 07:19:12 -08:00
Rose Thompson
f0948b3446 Merge pull request #515 from JacobPease/main 
Removed vivado property from rom1p1r.sv. It's now dynamically added using the FPGA makefile.
 2023-12-05 11:50:32 -08:00
Jacob Pease
bc2c4d5295 Merge branch 'main' of github.com:openhwgroup/cvw 2023-12-04 15:23:22 -06:00
David Harris
67ee04b2fd Merge pull request #514 from ross144/main 
Sarah updated top level figure.
 2023-12-04 12:55:28 -04:00
Rose Thompson
b2d640d245 Merge branch 'main' of github.com:ross144/cvw 2023-12-04 00:00:56 -06:00
Rose Thompson
8933aef357 Reduced imperas linux run time to 10 seconds. 2023-12-04 00:00:26 -06:00
Rose Thompson
9348025727 Cachefsm simplifications. 2023-12-03 18:19:00 -06:00
Rose Thompson
1ebc7aa95a Optimized align. 2023-12-03 16:43:55 -06:00