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Author SHA1 Message Date
kipmacsaigoren
24f0f34aff Merge branch 'openhwgroup:main' into priv-tests 2023-03-07 13:46:55 -08:00
David Harris
e15058a721 Merge pull request #130 from ross144/main 
change signal names to match book.
 2023-03-07 09:38:35 -08:00
Ross Thompson
f067935eed Added Yujun Lin's branch predictor simulator. This is a C baseline module for common branch predictor algorithms. 2023-03-07 10:49:59 -06:00
David Harris
d9516acd46 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-07 06:31:44 -08:00
David Harris
77ba71be71 editorconfig to specify tabs/spaces. Fixed some tabs. Turn off coverage to speed up simulation 2023-03-07 06:31:40 -08:00
Ross Thompson
6d4e28fdf2 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-06 22:29:27 -06:00
Ross Thompson
610546f195 Merge pull request #129 from davidharrishmc/dev 
Further illegal instruction detection
 2023-03-06 22:29:11 -06:00
Ross Thompson
e448cd54ef Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-06 18:39:15 -06:00
Ross Thompson
a6b851a672 Renamed signals to be consistent with textbook. 2023-03-06 18:29:31 -06:00
Ross Thompson
31fcc0daf7 Renamed PCFSpill to PCSpillF. 2023-03-06 17:50:57 -06:00
Ross Thompson
473ed2b475 Renamed InstrFirstHalf to InstrFirstHalfF. 2023-03-06 17:48:57 -06:00
Ross Thompson
fdfb80a818 Renamed ebuarbfsm to ebufsmarb to match figures. 2023-03-06 17:47:55 -06:00
David Harris
7ecf4cdea8 Fixed bug about rv64 shifts only using 6 bits of funct7 2023-03-06 13:10:51 -08:00
David Harris
7e0c96cdcc Simplified decoder default to illegal instruction 2023-03-06 11:21:11 -08:00
David Harris
c2efdbdbbb More detailed decoding of load/store/branch/jump 2023-03-06 11:15:48 -08:00
Ross Thompson
be0318209e Updated fpga ila script. 2023-03-06 13:14:48 -06:00
Ross Thompson
00647b4612 Merge pull request #128 from davidharrishmc/dev 
Detecting illegal instructions with controller
 2023-03-06 13:10:31 -06:00
David Harris
54f53ca843 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-06 11:02:48 -08:00
David Harris
a56557d847 Improved decoding illegal instructions in controller 2023-03-06 11:02:42 -08:00
Ross Thompson
7b1b65e860 Working batch mode branch prediction simulations. 2023-03-04 17:59:16 -06:00
Kip Macsai-Goren
db6caedfec added in the CSR name for stimecmp(h) 2023-03-04 15:53:03 -08:00
Kip Macsai-Goren
ab6b953a4b removed changes to counteren from stimecmp tests 2023-03-04 15:46:57 -08:00
Kip Macsai-Goren
75f6e9eb34 added S time compare to gc configs 2023-03-04 15:46:26 -08:00
Ross Thompson
6766ecc28e Mostly working bpred launch script. 2023-03-04 17:20:45 -06:00
Ross Thompson
e9fa234410 Partial automation of branch predictor embenching. 2023-03-04 17:10:58 -06:00
Kip Macsai-Goren
a38f7cc8a1 added reset values to stime and stimecmp registers 2023-03-04 15:06:15 -08:00
Kip Macsai-Goren
ac5c53a870 Added correct causing and handling of S time interrupts to test suite. 2023-03-04 15:04:17 -08:00
Ross Thompson
93f2bacdae Updated parsing script. 2023-03-04 13:45:15 -06:00
David Harris
3678ab556c Removed unneeded diagnostic print 2023-03-03 16:46:16 -08:00
Ross Thompson
da74ed0369 Merge pull request #126 from davidharrishmc/dev 
ImperasDV setup
 2023-03-03 18:01:32 -06:00
David Harris
876c33da5f Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-03 15:54:42 -08:00
David Harris
a49f45f2f3 Setup ImperasDV if available 2023-03-03 15:54:35 -08:00
Ross Thompson
f07f331f72 Removed debugging code. 2023-03-03 17:52:00 -06:00
Ross Thompson
a3a45f696f Fixed a bunch of odd bugs with the test bench preventing correct measurement of performance counters. 2023-03-03 17:49:44 -06:00
David Harris
d83edbf6d6 Merge pull request #125 from ross144/main 
Modified Performance Counter Data Collection
 2023-03-03 13:12:35 -08:00
Ross Thompson
b0a9499f86 Oups included the wave file in the wally-batch.do script. 2023-03-03 15:10:07 -06:00
Ross Thompson
486148b45d Fixed batch mode regression test to work with hpmc loggic. 
Added logic to exclude the embench warmups from preformance counters.
 2023-03-03 14:59:20 -06:00
Ross Thompson
0ecd1ef681 Setup the testbench to exclude the warmup from performance counter reports. 2023-03-03 13:10:01 -06:00
Ross Thompson
e70492ea3f Added performance new counter prints to testbench. 2023-03-03 10:42:52 -06:00
David Harris
27f669118d Merge pull request #124 from ross144/main 
Added additional performance counters.  Ch 5 is update todate with these changes.
 2023-03-03 06:15:49 -08:00
Ross Thompson
dc49c2612d Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-03 00:22:27 -06:00
Ross Thompson
0cb5369351 Renamed BTB misprediction to BTA. 2023-03-03 00:18:34 -06:00
Ross Thompson
5b5677ccb8 Added divide cycle counter. 2023-03-02 23:59:52 -06:00
Ross Thompson
aabb454d1c Added the i and d cache cycle counters. 2023-03-02 23:54:56 -06:00
Ross Thompson
cfca77172e Added fence counter. 2023-03-02 23:29:20 -06:00
Ross Thompson
f32f8c109a Added csr write counter, sfence vma counter, interrupt counter, and exception counter. 2023-03-02 23:21:29 -06:00
Ross Thompson
a313b10912 Added store stall to performance counters. 2023-03-02 23:10:54 -06:00
Ross Thompson
2dd693a3b3 Reordered performance counters and added space for new ones. 2023-03-02 23:04:31 -06:00
Ross Thompson
724f2634c5 Fixed bug in performance counter script. 2023-03-02 22:32:13 -06:00
Ross Thompson
1f3639bff6 Added support for branch target buffer stats. 2023-03-02 22:16:30 -06:00