Kip Macsai-Goren
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b53ab27b26
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-01-05 18:38:29 +00:00 |
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James E. Stine
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edbaff4ea3
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-01-05 10:44:28 -06:00 |
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James E. Stine
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962e7dc782
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Add script to generate memfile using elf2hex
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2022-01-05 10:44:01 -06:00 |
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David Harris
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d17a305538
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Finished removing generate statements
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2022-01-05 16:41:17 +00:00 |
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David Harris
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6d4714651c
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Removed more generate statements
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2022-01-05 16:25:08 +00:00 |
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David Harris
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da5ead23bf
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Removed more generate statements
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2022-01-05 16:01:03 +00:00 |
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David Harris
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d66f7c841b
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Removed generate statements
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2022-01-05 14:35:25 +00:00 |
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Ross Thompson
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98be8201b2
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Renamed most signals inside cache.sv so they are agnostic to i or d.
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2022-01-04 23:52:42 -06:00 |
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Ross Thompson
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fffaf654e6
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the i and d caches now share common verilog.
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2022-01-04 23:40:37 -06:00 |
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Ross Thompson
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13dbf3cc0f
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parameterized the caches with the goal of using common rtl for both i and d caches.
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2022-01-04 22:40:51 -06:00 |
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Ross Thompson
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888a60d8d6
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Switched block for line in caches.
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2022-01-04 22:08:18 -06:00 |
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Ross Thompson
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cb301a78ad
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Fixed bug where last line of dcache was not written back to memory on dcache flush.
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2022-01-04 21:55:48 -06:00 |
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Ross Thompson
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101a8bdb5b
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-01-04 18:41:52 -06:00 |
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Ross Thompson
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ecc7bf5237
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Fixed dcache flush.
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2022-01-04 18:40:58 -06:00 |
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David Harris
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9ddc6db0a6
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Removed imperas mmu tests; using wallypriv instead
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2022-01-04 23:14:53 +00:00 |
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Kip Macsai-Goren
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04bcf5ef38
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cleaned up Imperas tests to pass make
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2022-01-04 21:32:21 +00:00 |
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Kip Macsai-Goren
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c65fc4d5e6
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-01-04 21:30:51 +00:00 |
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Kip Macsai-Goren
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46b0cb810d
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fixed arch tests to pass make, added 32 bit tests, addded all make-passing tests to tests.vh.
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2022-01-04 21:30:38 +00:00 |
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David Harris
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0a7ec3e58d
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Fixed bad address for F/fmsub_b18-01
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2022-01-04 21:04:06 +00:00 |
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Kip Macsai-Goren
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5218533ddc
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-01-04 20:58:08 +00:00 |
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David Harris
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d1a7416028
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-01-04 19:47:51 +00:00 |
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David Harris
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115287adc8
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Renamed wally-pipelined to pipelined
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2022-01-04 19:47:41 +00:00 |
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Kip Macsai-Goren
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3a1f2befb1
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-01-04 18:16:46 +00:00 |
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Ross Thompson
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f84200fee4
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Added mmu tests to regression-wally.
imperas64mmu passes but imperas32mmu does not.
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2022-01-04 11:13:36 -06:00 |
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Ross Thompson
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4fa19ae4c5
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Modified dcache to ensure nontranslated index is used.
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2022-01-04 10:53:53 -06:00 |
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Kip Macsai-Goren
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ac3bdc271f
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-01-04 06:38:28 +00:00 |
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Ross Thompson
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63fb70fa61
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-01-03 23:49:28 -06:00 |
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Ross Thompson
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105763d938
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Fixed icache stalling cpu when doing an uncached operation.
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2022-01-03 23:49:19 -06:00 |
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Kip Macsai-Goren
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a763c37959
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update 64 bit tests to make make work correctly and general cleanup
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2022-01-04 05:02:33 +00:00 |
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Kip Macsai-Goren
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03e26f29a4
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Update 32 bit memory tests to make make work correcttly and generally cleanup
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2022-01-04 04:59:47 +00:00 |
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Kip Macsai-Goren
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e13c050fa1
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-01-04 04:55:36 +00:00 |
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Ross Thompson
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2d1cb0c3a3
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Reordered inputs/outputs in caches.
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2022-01-03 22:52:50 -06:00 |
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Ross Thompson
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ff24718c28
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Added generate around the spill logic so it is only used if supporting compressed instructions.
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2022-01-03 22:23:04 -06:00 |
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Ross Thompson
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120a9d6a58
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Minor improvement to icache.
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2022-01-03 22:00:35 -06:00 |
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Ross Thompson
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89f4b920ff
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More Icache clean up.
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2022-01-03 21:22:34 -06:00 |
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Ross Thompson
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2f7cb82c72
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Major icache cleanup.
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2022-01-03 21:12:17 -06:00 |
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Ross Thompson
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b045d84147
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Removed spill support from icache.
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2022-01-03 21:03:02 -06:00 |
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Ross Thompson
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8c7638688b
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The ifu now directly supports compressed without the icache providing the implemenation.
The icache still constains all the orignal muxing logic to handle spills. This should be removed.
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2022-01-03 20:49:47 -06:00 |
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Ross Thompson
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324362eee5
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Almost working compressed instructions with compressed detection and processing in ifu rather than icache.
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2022-01-03 18:10:15 -06:00 |
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Ross Thompson
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82fbc502e0
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Prepared the ifu and icache for moving spills to ifu.
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2022-01-03 17:09:36 -06:00 |
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Ross Thompson
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d77ddd2cbf
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Fixed bug with the icache.
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2022-01-03 15:55:19 -06:00 |
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Ross Thompson
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c501276067
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Fixed a bug where the instruction fetch got out of sync with the icache.
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2022-01-03 13:27:15 -06:00 |
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David Harris
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95407a6ea7
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Replaced && and || with & and | in non-fp files per new style guidelines
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2022-01-02 21:47:21 +00:00 |
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David Harris
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77c00e996b
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Started adding asynchronous TIMECLK for CLINT
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2022-01-02 21:18:16 +00:00 |
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Katherine Parry
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cf7aa4e8ae
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some errors in FP ArchTests fixed
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2022-01-01 23:50:23 +00:00 |
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David Harris
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25dd532b6a
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Removed .* from MMU.
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2021-12-31 07:19:51 +00:00 |
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David Harris
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272e884581
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Removed .* from CSRs
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2021-12-31 07:11:03 +00:00 |
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David Harris
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ae3767bd54
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-12-31 06:40:25 +00:00 |
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David Harris
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62e6aed7e5
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Simplified performance counters
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2021-12-31 06:40:21 +00:00 |
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Ross Thompson
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2096d45c23
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2021-12-30 18:10:36 -06:00 |
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