Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity
4,854 Commits 5 Branches 2 Tags 53 MiB
53c8042276
Commit Graph

4854 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Ross Thompson
53c8042276 Signal renames for ras. 2023-01-13 15:56:10 -06:00
Ross Thompson
8e3e8591a6 Removed 1 bit from instruction classification. 2023-01-13 15:19:53 -06:00
Ross Thompson
37481fce77 More branch predictor cleanup. 
Found small bug. The decode stage was using the predicted instruction class rather than the decoded instruction class.
 2023-01-13 12:57:18 -06:00
Ross Thompson
b26cec1ef4 Possible optimization of gshare. 
I don't believe the Writeback stage ghr is needed.
 2023-01-13 12:39:29 -06:00
Ross Thompson
f7dacb59f9 Possible minor enhancement to gshare. 2023-01-13 12:32:39 -06:00
Ross Thompson
14ecaabbf6 Nearly complete RVVI tracer. 
Missing PMP registers and performance counters other than MCYCLE and MINSTRET.
 2023-01-12 18:43:39 -06:00
Ross Thompson
59b135d895 Added supervisor mode registers to tracer. 2023-01-12 17:04:41 -06:00
Ross Thompson
6500321aaf Added M CSRs to the CSRArray. 2023-01-12 16:51:51 -06:00
Ross Thompson
8981739310 added machine csr to logger. 2023-01-12 16:35:19 -06:00
Ross Thompson
f3443e2eca Added support to print the gprs. 2023-01-12 16:09:30 -06:00
Ross Thompson
0ea0e7a9e1 rvvi trace is coming alone nicely. 2023-01-12 14:46:31 -06:00
Ross Thompson
9a180f88f7 Completely stripped down imperas simulation. 
run with
vsim -c -do "do wally-pipelined-imperas.do rv64gc"
 2023-01-12 12:48:38 -06:00
Ross Thompson
5112ffcbc9 Stripped out all signature checking. 
Removed multiple tests loop.
Only runs 1 test now.
 2023-01-12 12:45:44 -06:00
Ross Thompson
8ee80c5d54 Created separate imperas testbench. 
Resolved logger issue with the duplicated instructions after commit.
 2023-01-12 12:07:07 -06:00
Ross Thompson
f59e1d03fc Added instruction logger. 2023-01-12 10:09:34 -06:00
Ross Thompson
3a41854f2b Completed review of LSU. 2023-01-11 19:06:03 -06:00
Ross Thompson
f15de26f5c Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-11 18:52:49 -06:00
Ross Thompson
2f3bf9eaf5 Improved LSU formating. 2023-01-11 18:52:46 -06:00
sarah-harris
3b363f5f9d privilege unit -> privileged unit in ifu.sv 
privilege unit -> privileged unit in ifu.sv
 2023-01-11 16:33:08 -08:00
Ross Thompson
0362e88098 Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-11 17:26:11 -06:00
sarah-harris
829ab2c9aa Added Sarah.Harris@unlv.edu to alu.sv 
Added Sarah.Harris@unlv.edu to alu.sv
 2023-01-11 15:20:41 -08:00
Ross Thompson
a42d436962 Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-11 17:15:49 -06:00
David Harris
7d93659f6b changed name to CORE-V-WALLY 2023-01-11 15:15:08 -08:00
Ross Thompson
a024dbccd6 Updated header for LSU. 2023-01-11 17:15:07 -06:00
David Harris
8f4b33c900 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-11 15:13:58 -08:00
Ross Thompson
96c61bd2ca Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-11 17:09:23 -06:00
Katherine Parry
6f75bda815 fixed typo bug in fpu 2023-01-11 17:07:02 -06:00
Ross Thompson
5f31c681ff Updated branch predictor. 2023-01-11 17:00:45 -06:00
David Harris
b911056e66 Changed Wally to CORE-V Wally 2023-01-11 14:03:44 -08:00
David Harris
5a565ebeb5 FPU cleanup 2023-01-11 12:27:00 -08:00
David Harris
68347d3558 fpu cleanup 2023-01-11 12:18:06 -08:00
David Harris
19f0eb2aa1 Rename FP and FPU to F in signal names 2023-01-11 11:46:36 -08:00
David Harris
41076d4639 FPU comments 2023-01-11 11:31:28 -08:00
David Harris
e6f110b953 Replaced MDUE with IntDivE in FDIVSQRT 2023-01-11 11:06:37 -08:00
David Harris
3a29e74647 Switched to XZeroE from NumerZeroE in square root preprocessor 2023-01-10 12:37:49 -08:00
David Harris
e92cffbb5e Changed MIT license to Solderpad License 2023-01-10 11:35:20 -08:00
David Harris
ddb65ff85f Division constant cleanup 2023-01-10 11:14:59 -08:00
David Harris
080e8884db Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-09 13:04:37 -08:00
David Harris
4f4b49886e Changed DIVN from NF+3 to NF+2, cleanup 2023-01-09 13:04:34 -08:00
Ross Thompson
0a77d80224 Added folded gshare predictor with k=16 and depth=10. 2023-01-09 14:41:03 -06:00
David Harris
87e07e9081 Divider constant cleanup, made CORRSHIFTSZ consistent 2023-01-09 12:34:19 -08:00
Ross Thompson
8e618dd1b3 Added better branch predictor to fpga config. 2023-01-09 13:46:30 -06:00
Ross Thompson
685db5bb90 Fixed branch predictor. 2023-01-09 13:45:49 -06:00
Ross Thompson
e3df1d3326 Restored to default configuration. 2023-01-09 00:21:45 -06:00
Ross Thompson
61c24c523d Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2023-01-09 00:18:11 -06:00
Ross Thompson
f032eae7f5 Might have actually solved the gshare bug. 2023-01-09 00:11:25 -06:00
Ross Thompson
97feea2f48 Possibly working speculative global history. 2023-01-08 23:46:53 -06:00
Ross Thompson
a35fb3addd core part of global history works now. forwarding is still broken. 2023-01-08 23:35:02 -06:00
David Harris
a757dcb5bd Cache code cleanup 2023-01-07 15:49:18 -08:00
David Harris
989b209a60 Cache code cleanup 2023-01-07 15:46:23 -08:00