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https://github.com/openhwgroup/cvw
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Signal renames for ras.
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@ -33,13 +33,16 @@ module RASPredictor
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)
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(input logic clk,
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input logic reset,
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input logic pop,
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output logic [`XLEN-1:0] popPC,
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input logic push,
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input logic PopF,
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output logic [`XLEN-1:0] RASPCF,
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input logic PushE,
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input logic incr,
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input logic [`XLEN-1:0] pushPC
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input logic [`XLEN-1:0] PCLinkE
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);
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// *** need to update so it either doesn't push until the memory stage
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// or need to repair flushed push.
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// *** need to repair popped and then flushed returns.
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logic CounterEn;
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localparam Depth = $clog2(StackSize);
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@ -47,13 +50,13 @@ module RASPredictor
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logic [StackSize-1:0] [`XLEN-1:0] memory;
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integer index;
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assign CounterEn = pop | push | incr;
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assign CounterEn = PopF | PushE | incr;
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assign PtrD = pop ? PtrM1 : PtrP1;
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assign PtrD = PopF ? PtrM1 : PtrP1;
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assign PtrM1 = PtrQ - 1'b1;
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assign PtrP1 = PtrQ + 1'b1;
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// may have to handle a push and an incr at the same time.
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// may have to handle a PushE and an incr at the same time.
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// *** what happens if jal is executing and there is a return being flushed in Decode?
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flopenr #(Depth) PTR(.clk(clk),
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@ -67,12 +70,12 @@ module RASPredictor
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if(reset) begin
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for(index=0; index<StackSize; index++)
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memory[index] <= {`XLEN{1'b0}};
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end else if(push) begin
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memory[PtrP1] <= #1 pushPC;
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end else if(PushE) begin
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memory[PtrP1] <= #1 PCLinkE;
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end
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end
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assign popPC = memory[PtrQ];
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assign RASPCF = memory[PtrQ];
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endmodule
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@ -156,11 +156,11 @@ module bpred (
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// *** needs to include flushX
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RASPredictor RASPredictor(.clk(clk),
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.reset(reset),
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.pop(PredInstrClassF[2] & ~StallF),
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.popPC(RASPCF),
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.push(InstrClassE[3] & ~StallE),
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.PopF(PredInstrClassF[2] & ~StallF),
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.RASPCF,
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.PushE(InstrClassE[3] & ~StallE),
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.incr(1'b0),
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.pushPC(PCLinkE));
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.PCLinkE);
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assign BPPredPCF = PredInstrClassF[2] ? RASPCF : BTBPredPCF;
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