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Author	SHA1	Message	Date
bbracker	6c422cd357	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-03-02 17:46:40 +00:00
bbracker	e994f70dab	change main.config so that buildroot expects linux.config and busybox.config to be at $RISCV/buildroot	2022-03-02 17:46:33 +00:00
David Harris	022e799e82	removed imperas-riscv-tests	2022-03-02 17:28:55 +00:00
David Harris	3bea7bb431	removed imperas-riscv-tests	2022-03-02 17:28:20 +00:00
bbracker	5f5cc514b8	fix buildroot checkpointing and add it back to regression	2022-03-02 16:00:19 +00:00
bbracker	4f22a55dd4	add LRSC test and add wally64a to regression	2022-03-02 07:09:37 +00:00
bbracker	e1bea211a7	fix AMO test	2022-03-02 05:41:20 +00:00
David Harris	1661983345	FMA project ready to start	2022-03-01 20:58:08 +00:00
David Harris	91a593c020	Fixed march compiling privileged tests to support AMO tests.	2022-03-01 18:02:45 +00:00
bbracker	29086ea393	checkpoint sweep script -- not sure if this deserves to be on the repo in the long run, but it is helpful	2022-03-01 03:48:31 +00:00
bbracker	dd4882ab27	copy over truncated trace into checkpoint if not freshly generating a trace	2022-03-01 03:38:48 +00:00
bbracker	41b3912abc	buildroot graphical sim bugfix	2022-03-01 03:24:23 +00:00
bbracker	5c11ff2a72	add option to not generate a trace when making checkpoints	2022-03-01 03:13:01 +00:00
bbracker	04ace8c154	switch linux-testbench infrastructure over to new linux testvectors at /opt/riscv	2022-03-01 03:11:43 +00:00
bbracker	2588055644	remove old testvector-generation folder	2022-03-01 01:46:26 +00:00
bbracker	34d44772d5	script for dumping out QEMU ram and bootrom state at ground 0	2022-03-01 01:45:09 +00:00
bbracker	ba5abd1297	typo fix to checkpoint generator	2022-03-01 00:51:54 +00:00
bbracker	4bee3bcf27	tentatively add WALLY-AMO test to arch test infrastructure	2022-03-01 00:40:11 +00:00
bbracker	d620fb4442	deprecate imperas64p tests and move them over to the privilege configuration of wally-riscv-arch-test	2022-03-01 00:37:46 +00:00
bbracker	1428ebd24c	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-02-28 23:00:07 +00:00
bbracker	8321c76d95	greatly improve trace-generating checkpoint process with QEMU hack	2022-02-28 23:00:00 +00:00
bbracker	8f2a533470	change pipe silencer to redirect to stderr so that we can see if QEMU is at least still alive	2022-02-28 22:55:23 +00:00
David Harris	f314e60dc8	Renamed unpacking unit to unpack and renamed WriteDataW to ResultW in IEU datapath	2022-02-28 20:50:51 +00:00
David Harris	8e38496ed7	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-02-28 20:34:35 +00:00
David Harris	598db29309	fpcalc Makefile	2022-02-28 20:34:33 +00:00
David Harris	f0a7ae2bba	adrdecs comments	2022-02-28 20:33:41 +00:00
James E. Stine	76a4b80528	Minor tweak of output of fpcalc - can be reversed with commented out code	2022-02-28 14:10:22 -06:00
Kip Macsai-Goren	f54ed94dbc	Changed PMA tests to only allow native length accesses to CLINT	2022-02-28 19:22:44 +00:00
Kip Macsai-Goren	b77fde3f89	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-02-28 19:14:18 +00:00
David Harris	8e3fd48e38	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-02-28 19:13:54 +00:00
David Harris	e108eb5195	Modified address decoder for native access to CLINT	2022-02-28 19:13:14 +00:00
Shreya Sanghai	b33c9ab7bb	changed filename	2022-02-28 17:33:15 +00:00
Shreya Sanghai	6f6b4df771	Copied previous cofig file instead of orig	2022-02-28 17:32:08 +00:00
Shreya Sanghai	9ca4fde35e	Makefile for running multiple synthesis	2022-02-28 17:15:43 +00:00
Shreya Sanghai	76fbf6a82e	added make allsynth	2022-02-28 17:15:43 +00:00
David Harris	3519a20ccf	hptw cleanup for synthesis	2022-02-28 05:54:34 +00:00
David Harris	659b75fc2b	Corrected printing doubles	2022-02-28 04:28:07 +00:00
David Harris	c97c6dd1b0	ZMerge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-02-28 04:15:23 +00:00
David Harris	ec27df6a12	Enhanced printing intermediate results in fpcalc.c	2022-02-28 04:15:20 +00:00
Kip Macsai-Goren	7be3cef076	added snippet to ignore comments in .diff files as well	2022-02-27 23:29:46 +00:00
Kip Macsai-Goren	6ed010adda	added minor sections to MMU tests that had been missing, global bits still need to be checked	2022-02-27 23:28:44 +00:00
David Harris	30b0f21255	New softfloat_calc program	2022-02-27 20:35:01 +00:00
David Harris	bb14dba9be	Created softfloat_demo showcasing how to do math with SoftFloat	2022-02-27 18:17:21 +00:00
David Harris	046259cff8	Moved regression work directories to regression/wkdir to reduce clutter	2022-02-27 17:35:09 +00:00
David Harris	c7b5d32a72	Linking against riscv-isa-sim SoftFloat library for RISC-V NaN behavior	2022-02-27 17:23:33 +00:00
David Harris	c6561d1e8b	Moved FMA back into source tree to facilitate synthesis	2022-02-27 15:41:41 +00:00
David Harris	eb0bbacd43	Temporarily removed tests/imperas-riscv-tests from Makefile because of license issue	2022-02-27 15:12:10 +00:00
David Harris	274ecf13ad	Moved fma directory	2022-02-27 14:20:15 +00:00
David Harris	5a5142c14f	fma simulation infrastructure	2022-02-27 04:36:43 +00:00
David Harris	d917cc1379	fma passing multiply vectors	2022-02-27 04:36:01 +00:00