Jordan Carlin
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5003cd56a8
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Fix environment variables
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2024-06-22 16:05:20 -07:00 |
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Jordan Carlin
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0e22c99467
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Initial attempt at unified script
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2024-06-22 13:07:34 -07:00 |
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Jordan Carlin
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2e55213286
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Update install script comments and clean up packages.
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2024-06-22 12:37:30 -07:00 |
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Jordan Carlin
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ad18734125
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Update ubuntu toolchain install to match new red hat form in preparation for merging of scripts.
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2024-06-22 12:37:25 -07:00 |
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Jordan Carlin
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9fc9e3c23d
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red hat install script syntax updates and allow for overriding of $RISCV directory
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2024-06-22 12:37:20 -07:00 |
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Jordan Carlin
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55225f0d00
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Red Hat family distro detection improvements
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2024-06-22 12:37:15 -07:00 |
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Jordan Carlin
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2f7205b278
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code style fixes
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2024-06-22 12:36:56 -07:00 |
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Jordan Carlin
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b646dca8f6
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Check if repo cloned but tool not installed (if there was an error and the script is being rerun), and install if so
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2024-06-22 12:36:56 -07:00 |
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Jordan Carlin
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bcc01b78d6
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red hat install script checks distro & version to determine what to install. Groundwork laid for ubuntu in same file.
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2024-06-22 12:34:09 -07:00 |
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Jordan Carlin
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f682a71e24
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Update to use EPEL package repo for ccache and gperftools
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2024-06-22 12:32:57 -07:00 |
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Jordan Carlin
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2f55ac1cc7
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Update red hat install script to only install each tool if it is the first time or if there are updates
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2024-06-22 12:32:57 -07:00 |
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Jordan Carlin
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c568bdcfa3
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initial version of red hat install toolchain
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2024-06-20 20:47:18 -07:00 |
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Rose Thompson
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e1fc44a5bf
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Merge pull request #849 from davidharrishmc/dev
lint cleanup and divider optimization
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2024-06-20 09:04:19 -07:00 |
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David Harris
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d8d94eeafa
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Merge pull request #808 from jordancarlin/main
Update riscv-arch-test
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2024-06-20 08:43:41 -07:00 |
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Jordan Carlin
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90f5a4ef48
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Only run fmsub_b15 for f_fma test
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2024-06-20 07:48:33 -07:00 |
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David Harris
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25780f53ce
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Fixed Verilator testbench issue from FunctionName by rolling back to old if. PC=0 detection is disabled for now.
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2024-06-20 00:57:58 -07:00 |
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David Harris
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27457f4ef4
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Merge pull request #848 from ross144/main
Covergen doesn't produce stores and riscv-dv only generates tests
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2024-06-20 00:10:33 -07:00 |
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David Harris
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0ab3f28991
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Lint cleanup
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2024-06-20 00:10:03 -07:00 |
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Ross Thompson
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e88a2f7eaa
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Merge branch 'main' of github.com:ross144/cvw into main
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2024-06-19 15:14:28 -07:00 |
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Ross Thompson
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9e93f21990
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Updated covergen to not include stores as they are incomplete.
Modified makefile riscv-dv to not simulation only generate tests.
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2024-06-19 15:13:49 -07:00 |
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David Harris
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5f1ee1ac85
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Fixed undriven signal in certain config
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2024-06-19 15:12:35 -07:00 |
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David Harris
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e4febf25ae
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Merge pull request #847 from ross144/main
Partial fix for verilator +args. At least compiles.
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2024-06-19 14:27:39 -07:00 |
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Rose Thompson
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46ace521c6
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Updated verilator makefile.
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2024-06-19 16:25:31 -05:00 |
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David Harris
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9922b24cbe
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2024-06-19 14:13:08 -07:00 |
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David Harris
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1ffd30f2e1
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Merge pull request #846 from ross144/main
Removes *** from all system verilog
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2024-06-19 14:12:56 -07:00 |
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Ross Thompson
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685f4d3807
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Removed the last of the ***.
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2024-06-19 14:00:31 -07:00 |
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Ross Thompson
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2d8973df1d
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Updated wavefile to use new names.
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2024-06-19 13:57:28 -07:00 |
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Ross Thompson
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64712d2243
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Updated wave to match changes in testbench.
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2024-06-19 13:51:50 -07:00 |
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Ross Thompson
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d368f2e77e
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Removed *** from testbench.
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2024-06-19 13:51:37 -07:00 |
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Ross Thompson
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7f0ba87231
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Updated comments in uart.
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2024-06-19 13:51:30 -07:00 |
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Ross Thompson
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91c844ca45
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Removed more *** from camline and csrc.
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2024-06-19 12:31:50 -07:00 |
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Ross Thompson
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576f1b9e59
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Moved the *** from trap to an issue.
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2024-06-19 12:31:24 -07:00 |
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Ross Thompson
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9b6b6617af
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Cleaned up hptw.
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2024-06-19 12:02:56 -07:00 |
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Ross Thompson
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24916d42e2
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Refactored TLBMiss and TLBMissOrUpdateA(D) to simplify spill, ifu, lsu, and hptw.
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2024-06-19 11:40:02 -07:00 |
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Ross Thompson
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71f267a17a
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Added InstrUpdateDAF to the HPTW.
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2024-06-19 11:09:49 -07:00 |
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Ross Thompson
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77523c52c2
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LSU no longer has ***.
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2024-06-19 10:56:07 -07:00 |
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Ross Thompson
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5e5ca0809f
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Removed more *** from lsu and updated assertions for dtim.
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2024-06-19 10:52:51 -07:00 |
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Ross Thompson
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4911642427
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Removed *** and updated comments for bpred and align.
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2024-06-19 10:31:44 -07:00 |
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Ross Thompson
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f0e5bbef0c
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Removed remaining *** from IFU.
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2024-06-19 09:52:40 -07:00 |
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Ross Thompson
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cc58bfdcf3
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Removed more *** from the ifu.
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2024-06-19 09:49:17 -07:00 |
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Ross Thompson
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ab1ee3d69b
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Removed *** from IFU, lrcs.
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2024-06-19 09:40:35 -07:00 |
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Ross Thompson
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c5dac4d775
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Removed *** from fpga top.
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2024-06-19 09:28:21 -07:00 |
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Ross Thompson
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ab1af0fabf
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Merge branch 'main' of https://github.com/openhwgroup/cvw into main
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2024-06-19 09:25:39 -07:00 |
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David Harris
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10e6d5846b
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Removed unnecessary Umfirst from early termination
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2024-06-19 09:18:51 -07:00 |
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David Harris
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4b4980e42d
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Fixed undriven OutFmt
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2024-06-19 09:17:32 -07:00 |
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David Harris
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54cb612577
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Fixed lint error in fdivsqrtpreproc for rv32 IDIV_ON_FPU
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2024-06-19 07:48:54 -07:00 |
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David Harris
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1f569ed6f8
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Merge pull request #838 from jordancarlin/vcs_fix
Update VCS RTL file exclusions with renamed ram
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2024-06-19 05:29:40 -07:00 |
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Jordan Carlin
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156bfc0387
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Update f_fma tests to use smaller files from riscv-arch-test
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2024-06-18 23:38:03 -07:00 |
|
Jordan Carlin
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569ccfd829
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Update riscv-arch-test submodule
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2024-06-18 23:34:02 -07:00 |
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Jordan Carlin
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d58b454a8b
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Finish switching Zfa to use riscv-arch-test
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2024-06-18 23:31:37 -07:00 |
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