Divya2030
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3853f94337
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Revert "initial commit pmp basic coverage working"
This reverts commit 7ca1c976c0.
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2024-05-02 11:23:59 -07:00 |
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Divya2030
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7ca1c976c0
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initial commit pmp basic coverage working
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2024-05-02 10:33:29 -07:00 |
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David Harris
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1274ec55af
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Resolved merge conflict
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2024-04-26 16:15:23 -07:00 |
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Quswar Abid
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f999ccadf4
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/cad/mentor/questa_sim-2023.4/questasim is fixed, relative paths to design and testbench files are fixed, and RISCV-DV submodule is updated back to the latest commit on master branch
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2024-04-26 15:55:39 -07:00 |
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David Harris
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5d97858806
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Moved functional coverage files to sim/questa and to tests/riscvdv
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2024-04-24 11:46:38 -07:00 |
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Quswar Abid
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7b441d2881
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Bringup of RISCV-DV to collect functional coverage - Update to track RV64IMAFDC_Zicsr related coverpoints from riscvISACOV
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2024-04-23 18:20:29 -07:00 |
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slmnemo
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554f818a8c
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Fixed wave.do to match new conditional generate block names
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2024-04-16 14:43:38 -07:00 |
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Rose Thompson
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1eb1beed95
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Fixed merge conflict bug in the last pull request.
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2024-04-16 10:32:24 -05:00 |
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slmnemo
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4b80457f3e
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Fixed issue with Verilator hierarchical referencing by changing module names, moved run-imperas-linux to correct directory
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2024-04-12 21:58:20 -07:00 |
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Rose Thompson
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bb072fba84
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Fixed the buildroot issue.
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2024-04-06 18:25:53 -05:00 |
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Rose Thompson
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d0d1166e3f
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Got the separation of the -G and +variable arguments in the questa do file.
regression still runs.
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2024-04-06 18:04:48 -05:00 |
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Rose Thompson
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cdcff9d368
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Updated sim-wally to work with new run scripts.
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2024-04-06 16:32:07 -05:00 |
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Rose Thompson
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46fdfde7ec
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Removed unnecessary display from testbench.
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2024-04-06 16:10:18 -05:00 |
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David Harris
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c73a48cf22
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Removed unused wave-dos
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2024-04-06 13:52:13 -07:00 |
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David Harris
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6b844a2e6e
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Added GUI support and removed unused wave files
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2024-04-06 13:43:06 -07:00 |
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David Harris
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3c855e3e90
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Passing arguments to buildroot, not yet checking result correctly
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2024-04-06 11:42:41 -07:00 |
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David Harris
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ac9a21873d
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Pass TEST to testbench with +TEST=<name> rather than -G TEST=<name> so that we don't have to recompile for every new test
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2024-04-06 10:34:21 -07:00 |
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David Harris
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347df26713
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Fixed regression running; buildroot pending
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2024-04-06 09:46:56 -07:00 |
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David Harris
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9ee7544d3c
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TestFloat running; normal testbench broken
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2024-04-06 09:28:07 -07:00 |
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David Harris
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4b19f6d542
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testfloat running through wsim; moved lint, regression, wsim to bin directory so we don't need ./
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2024-04-06 08:22:39 -07:00 |
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David Harris
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4cc9dd7583
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regression-wally refactoring to support mulitple simulators
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2024-04-05 21:45:56 -07:00 |
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David Harris
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7b56809323
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wsim runs a Questa sim
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2024-04-05 19:08:14 -07:00 |
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David Harris
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a1d3e5b15e
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Moved do files into questa
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2024-04-05 18:42:48 -07:00 |
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David Harris
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a8a03d6011
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Reorganizing sim directory for multiple simulators
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2024-04-05 18:19:46 -07:00 |
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