Commit Graph

2434 Commits

Author SHA1 Message Date
David Harris
3d2671a8b0 Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
David Harris
913a78323c moved proposed-sdc 2022-01-07 12:44:21 +00:00
David Harris
6c0cd5ef20 piplined directory cleanup 2022-01-07 12:43:50 +00:00
David Harris
8481c93e1b Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-07 05:39:16 +00:00
Ross Thompson
de3bbd3fe0 Also fixed undetected bug with amo concurrent with tlb miss. It was possible for the amoalu to apply a function to the hptw readdata.
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2022-01-06 23:28:02 -06:00
David Harris
261882bf78 Used .* in wrapper 2022-01-07 05:23:42 +00:00
Ross Thompson
fa0080ca70 Modified the mmu to not mux the lower 12 bits of the physical address and instead directly
assign from the input non translated virtual address.  Since the lower bits never change there is
no reason to place these lower bits on a longer critical path.
The cache and lsu were previously using the lower bits from the virtual address rather than
the physical address.  This change will allow us to keep the shorter critical path and
reduce the complexity of the lsu, ifu, and cache drawings.
2022-01-06 23:19:09 -06:00
David Harris
2df92af488 Capitalized LSU and IFU, changed MulDiv to MDU 2022-01-07 04:30:00 +00:00
David Harris
27c1d73cb1 Code cleanup 2022-01-07 04:07:04 +00:00
Ross Thompson
5402b55c44 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-01-06 17:19:20 -06:00
Ross Thompson
0438975e27 Minor optimization to cache replacement. 2022-01-06 17:19:14 -06:00
David Harris
0c8d556311 Tests cleanup: 2022-01-06 23:07:22 +00:00
David Harris
6fafabbfad Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-06 23:04:33 +00:00
David Harris
53637049b7 Makefile make allclean 2022-01-06 23:04:30 +00:00
David Harris
ae64b859c3 Fixed multiplier nan boxing bug 2022-01-06 23:03:29 +00:00
Katherine Parry
631d05dcdc some FPU test fixes 2022-01-06 23:03:20 +00:00
Ross Thompson
e0740034f0 Clean up of cachefsm. 2022-01-06 16:32:49 -06:00
David Harris
3bfe23bc75 More FP unpacking fix 2022-01-06 22:22:22 +00:00
David Harris
f23965d47f Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-06 21:45:20 +00:00
David Harris
770780e394 Floating point test cleanup 2022-01-06 21:45:16 +00:00
Ross Thompson
6117c43028 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-01-06 15:18:27 -06:00
Ross Thompson
3625fc3bed Patched the ILA's debug2.xdc constraint file to work with the wally memory design. 2022-01-06 15:18:18 -06:00
David Harris
a5a89e58a8 Fixed unpacking bug; regression runs again 2022-01-06 18:22:30 +00:00
David Harris
eff9cec415 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-06 18:10:32 +00:00
David Harris
aca26de498 FPU debug and configurable logic cleanup 2022-01-06 18:10:25 +00:00
Ross Thompson
6edd4c5759 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-01-06 11:56:23 -06:00
Ross Thompson
c19b910f6e Updated fpga ILA constraints to match the new changes to the rtl. 2022-01-06 11:56:09 -06:00
Ross Thompson
8e10e15c64 Fixed bug in synthesis script. 2022-01-05 23:07:36 -06:00
Ross Thompson
f604a0d79e cleaned up cacheway and sram1rw.sv. also noticed possible bug in sram1rw.sv. 2022-01-05 22:56:18 -06:00
Ross Thompson
a4afc1bc54 More name cleanup in cache. 2022-01-05 22:37:53 -06:00
Ross Thompson
e74e8c2e86 Changed names of address in caches.
Removed old cache files.
2022-01-05 22:19:36 -06:00
Ross Thompson
1ab3a17ff7 Updates to support fpga. 2022-01-05 18:07:23 -06:00
Ross Thompson
9ea34e390a Fixed xilinx synth error with $error in extend.sv 2022-01-05 17:48:08 -06:00
Kip Macsai-Goren
c949764a44 fixed 32 vs 64 bit copying error 2022-01-05 23:14:12 +00:00
Ross Thompson
de32930e63 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-01-05 16:57:29 -06:00
Ross Thompson
da585b30f9 Slower but correct implementation of flush. 2022-01-05 16:57:22 -06:00
David Harris
fed44cf9cf Reinstated many arch f/d tests that had failed because of memfile issues 2022-01-05 22:44:10 +00:00
David Harris
8305eb80ff Restored many of the arch32f and arch64d that had been failing because of memfile issues 2022-01-05 22:23:46 +00:00
David Harris
27771f1756 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-05 22:10:50 +00:00
Kip Macsai-Goren
5754e16390 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-05 22:10:37 +00:00
David Harris
90dd961ea5 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-05 22:10:33 +00:00
David Harris
07932ad0aa Replaced exe2memfile with SiFive elf2hex 2022-01-05 22:10:26 +00:00
Kip Macsai-Goren
bd977efc7b updated pma tests for simpler test lib 2022-01-05 22:10:12 +00:00
kipmacsaigoren
900c1bfc9e Added the config file to the outputs of synth 2022-01-05 16:08:31 -06:00
Kip Macsai-Goren
8a8f903342 updated tests to make correctly with output verification 2022-01-05 21:43:15 +00:00
Kip Macsai-Goren
706c95a383 allowed option for tests to make without spike simulation. added postverify back in for outputs 2022-01-05 21:17:54 +00:00
Kip Macsai-Goren
1db58744b0 updated pma tests to match simpler test library. They don't pass regression yet 2022-01-05 21:13:40 +00:00
Kip Macsai-Goren
cc47b419be Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-05 20:17:52 +00:00
Ross Thompson
0310df96a4 Changes to wave file. 2022-01-05 14:16:59 -06:00
Ross Thompson
7086a0ed08 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-01-05 14:15:27 -06:00