naichewa
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58be9e0556
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Merge branch 'spi_debug'
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2024-09-03 15:00:59 -07:00 |
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naichewa
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3b7661dfd5
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SckDiv Zero bug fixes
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2024-09-03 14:58:46 -07:00 |
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David Harris
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ff9f0fa140
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Updated riscv-isac dependencies for security
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2024-09-03 03:46:44 -07:00 |
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Jacob Pease
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3b91977227
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Added start.s to spitest directory.
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2024-08-28 04:10:24 -05:00 |
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Jacob Pease
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44ece7cb96
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Added CVW header to spitest files.
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2024-08-27 14:28:49 -05:00 |
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Jacob Pease
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b7a74307c5
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Committing the custom test spitest.
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2024-08-27 14:19:56 -05:00 |
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Rose Thompson
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6be30369f1
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-08-21 11:02:23 -07:00 |
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Rose Thompson
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faffecf891
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-08-21 11:02:17 -07:00 |
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Rose Thompson
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01b623b8c4
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-08-21 11:02:08 -07:00 |
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Rose Thompson
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f603d21826
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Updated my name in multiple locations.
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2024-08-21 10:50:39 -07:00 |
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Huda-10xe
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ca21b865b3
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Adding regression commands to Makefile
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2024-08-21 15:45:23 +05:00 |
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Jacob Pease
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baad4e0fd2
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With Naiche's help, we fixed the SPI controllers clock polarity and phase settings. Added conditions to the SPI regression tests.
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2024-08-20 16:24:37 -05:00 |
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David Harris
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f4871c14f7
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Merge pull request #918 from jordancarlin/fp_tests_make
Testfloat vector generation refactoring + root Makefile cleanup
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2024-08-17 04:32:45 -07:00 |
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David Harris
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ef7028154c
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Merge pull request #873 from Shreesh-Kulkarni/main
Modified riscv-isacov and riscv-ctg files to support some missing quad instructions.
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2024-08-16 11:10:35 -07:00 |
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Jordan Carlin
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d6110c3d0b
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Set riscof jobs based on number of cores
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2024-08-15 19:02:48 -07:00 |
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Jordan Carlin
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3b85f92695
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Testfloat vector generation refactoring
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2024-08-15 18:53:26 -07:00 |
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Jordan Carlin
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6d77398c95
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Update linker scripts to avoid hardcoded /opt/riscv
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2024-08-09 20:15:28 -07:00 |
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Jordan Carlin
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357175f1c8
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Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
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2024-08-07 20:22:55 -07:00 |
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Huda-10xe
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2405b6c1e2
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Adding RVVI Functional Coverage Support
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2024-08-07 14:31:16 +05:00 |
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Jordan Carlin
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2f1a101735
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Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
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2024-07-25 21:21:57 -07:00 |
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David Harris
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b7fb786749
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Increased covergen.py functional coverage to 87.6%
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2024-07-23 04:38:13 -07:00 |
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David Harris
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a9fd6e6cfb
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Added more RV64I coverage generation
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2024-07-22 08:52:19 -07:00 |
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David Harris
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6ca7845c93
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Fixed hazard and rd_maxval coverage generation
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2024-07-21 19:46:30 -07:00 |
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Shreesh-Kulkarni
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82b42a5faf
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Modified riscv-isacov and riscv-ctg files to support some missing quad instructions. Needs debugging.
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2024-07-06 08:57:32 -07:00 |
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Jordan Carlin
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e6e070f4e4
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Update python shebangs to use /usr/bin/env python3 so virtual environment can be used (also aids in general portability)
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2024-07-03 20:42:55 -07:00 |
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Jordan Carlin
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2b4f12916e
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Merge pull request #858 from davidharrishmc/dev
Regression Improvements
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2024-07-01 20:04:31 -07:00 |
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James Stine
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f660779ba9
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Fix for Q causing it to error out - commented out line for ISA and reset-val so can be put back
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2024-06-28 12:17:15 -05:00 |
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David Harris
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8fe2052b1f
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Fix derived configuration with new derivgen script
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2024-06-26 16:09:59 -07:00 |
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David Harris
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21e5fa3103
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Merge pull request #854 from Shreesh-Kulkarni/main
Files for Quad Precision Testing Support for Wally
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2024-06-26 11:41:26 -07:00 |
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Shreesh-Kulkarni
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93fb0f2a84
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Files for Quad Precision Testing Support for Wally
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2024-06-26 11:36:04 -07:00 |
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David Harris
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0fcc7878dc
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Updated march lists
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2024-06-25 21:54:58 -07:00 |
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David Harris
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d8d94eeafa
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Merge pull request #808 from jordancarlin/main
Update riscv-arch-test
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2024-06-20 08:43:41 -07:00 |
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Ross Thompson
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9e93f21990
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Updated covergen to not include stores as they are incomplete.
Modified makefile riscv-dv to not simulation only generate tests.
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2024-06-19 15:13:49 -07:00 |
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Jordan Carlin
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d58b454a8b
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Finish switching Zfa to use riscv-arch-test
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2024-06-18 23:31:37 -07:00 |
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Jordan Carlin
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6f79dca9c4
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-05-27 12:29:24 -07:00 |
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Quswar Abid
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997b5901cc
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sb types are all passing, loaditypes are not!
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2024-05-27 04:27:50 -07:00 |
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Quswar Abid
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1bf9b13953
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added some sb types
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2024-05-27 03:58:38 -07:00 |
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Quswar Abid
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29d7cd5663
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unwanted comments
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2024-05-27 03:58:38 -07:00 |
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Quswar Abid
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8edc4057ed
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compilable tests generating for loaditypes[lb, lh, lw, ld, lbu, lhu, lwu]
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2024-05-27 03:58:38 -07:00 |
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Jordan Carlin
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dcafe4793e
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Add froundnx and fround.d tests
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2024-05-24 15:16:35 -07:00 |
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Jordan Carlin
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f410bbb79e
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Use Zfa tests from riscv-arch-test instead of wally-riscv-arch-test
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2024-05-21 00:04:27 -07:00 |
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Rose Thompson
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e295454948
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Merge pull request #798 from jordancarlin/newConfig
Update config to derive MISA from macros and update MISA bits based on the spec
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2024-05-15 10:28:44 -05:00 |
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Jordan Carlin
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1065b8977a
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Fix Q_SUPPORTED on derived configs
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2024-05-14 11:49:54 -07:00 |
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David Harris
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990d40410b
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Test using fpcalc for fp_dataset.py
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2024-05-14 11:11:24 -07:00 |
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Shreesh-Kulkarni
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9aebc1526e
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Python script to generate coverpoints for the IBM FP Dataset
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2024-05-14 10:43:32 -07:00 |
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Shreesh-Kulkarni
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0887e90367
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Modified IBM Floating Point Dataset Generator for Quads
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2024-05-14 10:34:45 -07:00 |
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David Harris
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75c10bddfa
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Moved case.sh to tests/fp
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2024-05-13 07:12:16 -07:00 |
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David Harris
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025e65ce1a
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Removed unnecessary printing from extract_arch_vectors
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2024-05-06 06:28:15 -07:00 |
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David Harris
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c8269c34a5
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Changed error to warning
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2024-05-06 03:50:17 -07:00 |
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David Harris
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99282165ae
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Directed functional coverage tests
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2024-05-04 02:45:01 -07:00 |
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