Commit Graph

36 Commits

Author SHA1 Message Date
Kevin Kim
b04d387e7c removed redundant signals 2024-06-28 22:13:35 -07:00
Kevin Kim
9a59c8e07f reduced bit widths for integer on fpu 2024-06-20 23:46:45 -07:00
David Harris
544aa7cd8d shiftcorrection cleanup 2024-06-12 04:13:51 -07:00
Rose Thompson
e295454948
Merge pull request #798 from jordancarlin/newConfig
Update config to derive MISA from macros and update MISA bits based on the spec
2024-05-15 10:28:44 -05:00
Jordan Carlin
bf397f791f
Change all SUPPORTED type localparamters to one bit logic. Update configs for consistency. 2024-05-14 16:24:26 -07:00
Jordan Carlin
4a72922087
update config to derive MISA from macros
- Remove C_SUPPORTED and update decompress unit based on Zc* extensions
- Derive A_SUPPORTED from A subextensions
- Derive B_SUPPORTED from B subextensions
- Derive C_SUPPORTED from C subextensions
2024-05-14 06:49:18 -07:00
David Harris
175c18da01 Parameterized FMA. However, some offsets are not parameterized. See PR #793 for list of changes 2024-05-13 15:16:00 -07:00
David Harris
2dfada0687 Started parameterizing FMA 2024-05-13 14:01:36 -07:00
David Harris
e87a269f59 Fix fcvt.lu.s bug and lint issue in packoutput 2024-05-12 11:31:27 -07:00
David Harris
380d88fc68 Merged config-shared after fma fix 2024-05-12 11:10:55 -07:00
David Harris
009d251433 Fixed cvtint bug by adding 2 bits to convert width; initial implementation of fround passes basic regression but fails some nightly regression cases 2024-05-11 22:32:51 -07:00
Katherine Parry
807ef44772 fixed fma testfloat issue #578 2024-05-10 18:12:11 -07:00
David Harris
53d6b96237 Increased NORMSHIFTSZ by 2 to fix failing testfloat cvtint with IDIV_ON_FPU=0, FLEN=32, XLEN=64 2024-05-10 13:42:52 -07:00
David Harris
db330b35b2 Removed unnecessary muxes from shiftcorrection; changed flag to --nightly in lint-wally 2024-04-16 20:57:49 -07:00
Jordan Carlin
cbd61d008f
fix size of CVTLEN to support fcvtmod.w.d; add max macro to config-shared.vh 2024-03-14 14:07:15 -07:00
Rose Thompson
3cf6a19729
Merge branch 'main' into main 2024-03-10 10:48:21 -05:00
Kevin Kim
2547e4c6d1 divider still works with NF+2 2024-03-03 11:17:51 -08:00
KelvinTr
01c45ab9d7 Fixed K extension changes 2024-02-28 17:05:08 -06:00
David Harris
dfee790ad7 Fixed derivative generation when derivs don't already exist. Fixed lint to print success when no failures. Added Zfh fma tests. Some fp tests not running yet. 2024-02-06 12:35:56 -08:00
David Harris
a4ca024025 Lint progress 2024-01-31 20:03:14 -08:00
David Harris
d801bf5d6c
Revert "more shiftcorrection bug fixes" 2024-01-21 10:41:14 -08:00
Kevin Kim
1459943a75 more shiftcorrection bug fixes 2024-01-21 10:08:48 -08:00
Kevin Kim
3241802441 fixed bug in CORRSHIFTSZ param 2024-01-21 08:25:17 -08:00
David Harris
bb3a7850c4 Simplified floating-point parameters in config-shared 2024-01-15 17:48:41 -08:00
David Harris
571c7d3be4 Divider cleanup 2023-11-12 19:41:12 -08:00
David Harris
f437336540 Explained sqrt preshifting 2023-11-12 10:05:54 -08:00
David Harris
6ac83c776e Cleaned up number of bits in fdivsqrt 2023-11-11 15:50:06 -08:00
David Harris
2bf5143163 Bug fixes related to size of fpdivsqrt bit count and number of cycles 2023-11-11 05:58:53 -08:00
David Harris
448ced00c5 Fixed testbench-fp to reflect signal name changes 2023-11-11 04:05:34 -08:00
David Harris
d5ba8fc5e6 fdivsqrt parameter cleanup 2023-11-10 18:33:08 -08:00
David Harris
3cae2385ab Simplified out LOGRK parameter 2023-11-10 18:19:41 -08:00
David Harris
953c53d065 fdivsqrt parameter cleanup 2023-11-10 09:11:15 -08:00
David Harris
4c106215f4 Started cleaning up shifting leading 1 in fdivsqrt 2023-11-10 08:46:55 -08:00
David Harris
f6a7f707bd Fixed test cases for medeleg issue 444. Also added a COMPRESSED_SUPPORTED parameter true when C or Zca is supported, and use this to get compressed hardware such as the spill logic and the +2 adder. 2023-10-30 09:56:17 -07:00
David Harris
c6631ef808 Added N and PBMT bits to MMU PTE 2023-08-24 19:44:46 -07:00
David Harris
d58ece3d44 renamed test-shared.vh to config-shared.vh 2023-07-30 05:22:39 -07:00