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Author SHA1 Message Date
DTowersM
d3c8ee7154 added support for embench post processing to testbench.sv 2022-06-01 21:00:44 +00:00
DTowersM
9e4f17fed9 some changes to further support vsim on embench 2022-06-01 17:19:19 +00:00
Katherine Parry
707067548f unpacker optimizations 2022-06-01 16:52:21 +00:00
slmnemo
108f32e9df Fixed double assignment on LSUBurstType 2022-06-01 01:04:49 +00:00
cturek
e3a0ee333f Fixed typos 2022-06-01 00:07:36 +00:00
slmnemo
56121b3587 Added signals to change HTRANS to the correct signal based on schematic as well as a way to tell if we are not on the first access 2022-05-31 16:33:05 -07:00
slmnemo
2b80788235 Merge branch 'cacheburstmode' of github.com:davidharrishmc/riscv-wally into cacheburstmode 2022-05-31 15:57:55 -07:00
slmnemo
c24f88c2e9 Redid the FSM to prepare for burst mode implementation 2022-05-31 15:57:42 -07:00
David Harris
efe4b3e8fe Unpackinput cleanup 2022-05-31 22:31:21 +00:00
David Harris
99da6537cc Removed normalized output from unpack and simplified interface 2022-05-31 21:32:31 +00:00
David Harris
79df271a6f Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-05-31 21:12:45 +00:00
David Harris
31815422d2 ../src/privileged/csrc.sv 2022-05-31 21:12:17 +00:00
DTowersM
f7491e8445 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-05-31 20:13:41 +00:00
DTowersM
2088c0cd7c added testbench.sv support for embench tests, test output still WIP 2022-05-31 20:13:32 +00:00
DTowersM
abb6ba97cf removed delapidated signals SIE_REGW SIP_REGW TimerIntM SwIntM 2022-05-31 20:10:56 +00:00
DTowersM
ea07588999 added embench tests to tests.vh 2022-05-31 20:08:04 +00:00
DTowersM
4bbacd3742 dummy start trigger and stop trigger support for make file 2022-05-31 20:05:51 +00:00
Katherine Parry
cd7fe9af61 reorginized unpackinput signals 2022-05-31 17:40:34 +00:00
Katherine Parry
559c0c278e added unpackinput.sv 2022-05-31 16:18:50 +00:00
David Harris
8b493e16f5 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-05-31 14:58:18 +00:00
David Harris
2935188035 Moved delegation logic from privmode to trap to simplify interface 2022-05-31 14:58:11 +00:00
Madeleine Masser-Frye
8510474174 plots saved to synthDC/plots instead of shown 2022-05-30 19:56:47 +00:00
Madeleine Masser-Frye
d5e0eb9eb4 added optimized area plotting 2022-05-30 18:54:02 +00:00
David Harris
d1ef3b8981 Removed unused fp add and convert modules 2022-05-29 23:07:56 +00:00
Katherine Parry
835a4e4606 fixed lint error 2022-05-28 10:20:13 -07:00
slmnemo
3b9ae58f59 Reverted commit 9b55e9da38 2022-05-28 04:00:01 -07:00
slmnemo
2f3689063a Revert Commit 61ebf68939 2022-05-28 03:35:17 -07:00
slmnemo
9b55e9da38 Changed NO_IE_MTIME_CHECKPOINT so it uses the new parameter name 2022-05-28 03:16:55 -07:00
slmnemo
61ebf68939 Deparametrized Linux testbench and removed mentions of parameters in wally-pipelined.do 2022-05-28 03:14:49 -07:00
slmnemo
f426850bc7 Reverted incorrect Ack 2022-05-28 10:06:26 +00:00
David Harris
80315fedff fixed merge conflicts 2022-05-28 09:44:55 +00:00
David Harris
4335895b21 Added comments to some files, added a+b = 0 detector to comparator.sv 2022-05-28 09:41:48 +00:00
Madeleine Masser-Frye
4ed7283ad1 fixed normalization vertical axes, added TechSpecs type 2022-05-28 04:57:18 +00:00
Katherine Parry
822866fd0a removed unused signal from FMA 2022-05-27 16:47:56 -07:00
Katherine Parry
892ed38b6d Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-05-27 14:37:34 -07:00
Katherine Parry
d5c249bf71 unpacker adds 1 to denorm expoents 2022-05-27 14:37:10 -07:00
Madeleine Masser-Frye
232f8311df Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-05-27 20:59:27 +00:00
Madeleine Masser-Frye
fa453986ad plotting updates, normalization 2022-05-27 20:59:23 +00:00
Katherine Parry
3c63db9554 some optimizations in unpacker 2022-05-27 11:36:04 -07:00
Katherine Parry
b288f812ab moved lzc to generic and small optimizations on fcvt 2022-05-27 09:04:02 -07:00
Katherine Parry
efb972c6d3 Removed guard bit from fma rounding 2022-05-27 08:23:46 -07:00
slmnemo
bddc32ed21 changed ahb FSM and caught potential bug in ack/wordcountthreshold when on last word 2022-05-26 18:41:27 -07:00
DTowersM
74b05d371b Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-05-26 23:36:49 +00:00
DTowersM
547537d1d3 embench addition: added options to create .elf, .objdump, .memfile, .addr and .lab files from the executible in the embench build directory 2022-05-26 23:36:38 +00:00
slmnemo
efce3e4953 added LSUBurstDone signal to signal when a burst has finished 2022-05-26 16:29:13 -07:00
cturek
f7a3855af1 fixed sizing issues in expcalc 2022-05-26 22:35:17 +00:00
Madeleine Masser-Frye
cba93aa1c0 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-05-26 22:24:43 +00:00
Madeleine Masser-Frye
b765a379e3 added square delay area plot 2022-05-26 22:24:39 +00:00
cturek
a025014650 Implemented on-the-fly conversion for unsigned numbers 2022-05-26 22:20:43 +00:00
Madeleine Masser-Frye
e76986b31e fixed synth scraping, best delay plotting 2022-05-26 20:51:00 +00:00