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Author	SHA1	Message	Date
bbracker	05dd37d3d6	rename dump-dts debug script	2022-02-10 00:10:09 +00:00
bbracker	f823338597	continue to rename devicetree to wally-virt	2022-02-10 00:08:28 +00:00
bbracker	62d1ed65d4	rename devicetree to wally-virt	2022-02-10 00:07:29 +00:00
Ross Thompson	21f6feb510	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-09 16:44:33 -06:00
Ross Thompson	c7a2e6cb06	Commented quit.	2022-02-09 16:44:26 -06:00
James E. Stine	13e826561f	Update on README.md for synthDC	2022-02-09 16:20:05 -06:00
Ross Thompson	d1e79aaea5	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-09 16:11:31 -06:00
Ross Thompson	bb092a9dff	Added support for 90nm.	2022-02-09 16:06:27 -06:00
James E. Stine	216e050ecf	Add power analysis to synth.tcl	2022-02-09 16:04:20 -06:00
Ross Thompson	ed4e912413	Cleaned up synthesis flow.	2022-02-09 15:18:49 -06:00
Ross Thompson	04cf60a6bf	Updated synthesis and Makefile to output into binned directories.	2022-02-09 15:06:42 -06:00
David Harris	12dfcd8213	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-02-09 19:47:52 +00:00
David Harris	cb86e1cda9	Merged synthesiss scripts into main	2022-02-09 19:47:50 +00:00
bbracker	440cac9f77	minor interrupt syntax fix	2022-02-09 02:56:39 +00:00
bbracker	789ce53355	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-02-09 02:30:00 +00:00
bbracker	84ffdfc8c4	add tracegen support for interrupt parsing	2022-02-09 02:29:47 +00:00
Ross Thompson	01126535db	Annotated the final changes required to move sram address off the critial path.	2022-02-08 18:17:31 -06:00
Ross Thompson	7133e790ea	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-08 17:52:15 -06:00
Ross Thompson	498388c636	Cache cleanup write enables.	2022-02-08 17:52:09 -06:00
Ross Thompson	8a49ec90d0	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-08 15:43:18 -06:00
Ross Thompson	6a82ee0579	Fixed debug2.xdc to match wally changes.	2022-02-08 15:23:44 -06:00
Ross Thompson	e0a605e95d	Cleanup IFU.	2022-02-08 14:54:53 -06:00
Ross Thompson	d1d014bf1d	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-08 14:47:15 -06:00
Ross Thompson	13561c67bd	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-08 14:22:19 -06:00
Ross Thompson	cecbb3362d	rv32e works for now. Still need to optimize.	2022-02-08 14:21:55 -06:00
Ross Thompson	39149c618f	Moved some muxes back into the bp.	2022-02-08 14:17:44 -06:00
David Harris	3e16730226	RAM simplification	2022-02-08 20:15:23 +00:00
Ross Thompson	d5d9bb9d4d	Temporary commit which gets the no branch predictor implementation working.	2022-02-08 14:13:55 -06:00
David Harris	c07584bb70	rv32e config update	2022-02-08 17:59:50 +00:00
Ross Thompson	c2377eaaf4	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-08 11:36:30 -06:00
Ross Thompson	3cd067ac6a	Finished merge.	2022-02-08 11:36:24 -06:00
David Harris	f91c1aa3ea	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-02-08 16:41:13 +00:00
David Harris	9ad3f26365	Restored E tests to makefrag	2022-02-08 16:41:11 +00:00
bbracker	9cb94d18b3	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-02-08 16:08:04 +00:00
Ross Thompson	492c1473f3	Preparing to make a major change to the cache's write enables.	2022-02-08 09:47:01 -06:00
David Harris	e5097e67d4	Fixed TIM tests; rv32e test still failing	2022-02-08 15:24:37 +00:00
David Harris	e9a519a228	Patching up testbench; fixed false passing, but rv32ic and rv32e tests now fail	2022-02-08 12:40:02 +00:00
David Harris	096242a6d8	Merged TIM and regular testbenches. RV32e now working and back in regression.	2022-02-08 12:18:13 +00:00
bbracker	61f2ae929b	update buildroot main.config to reflect most recent image build	2022-02-08 11:47:26 +00:00
bbracker	9ee4b39b01	restore trace generation functionality for new setup	2022-02-08 11:45:42 +00:00
bbracker	f642e4fb2c	gitignore dtb's because we only care about dts's as being source files	2022-02-08 11:14:59 +00:00
bbracker	b165fe3937	add trimmed-down virt devicetree to repo for QEMU	2022-02-08 11:11:44 +00:00
David Harris	f31e4910a8	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-02-08 10:26:39 +00:00
David Harris	72c2166223	Lab 3 file cleanup	2022-02-08 10:26:37 +00:00
bbracker	775e07d69a	trying to move away from QEMU patches	2022-02-08 10:05:38 +00:00
bbracker	26f2c139e6	fix typo	2022-02-08 08:12:45 +00:00
bbracker	8688c457cb	add buildroot script	2022-02-08 08:10:32 +00:00
Ross Thompson	190d619940	cachefsm cleanup.	2022-02-07 22:09:56 -06:00
Ross Thompson	ca459a5915	Removed VDWriteEnable.	2022-02-07 21:59:18 -06:00
bbracker	929a9f0f1d	refactor buildroot-config-src into linux folder	2022-02-08 00:26:06 +00:00