53 Commits

Author	SHA1	Message	Date
Katherine Parry	478a2e2a4b	removed an adder out of early termination	2022-06-28 18:01:11 +00:00
cturek	3a40c68549	Updated radix 2 divider to work with integers and floats in new structure. Integers still might not work.	2022-06-27 23:55:21 +00:00
cturek	54938c7abf	Added int tests	2022-06-27 21:44:06 +00:00
Katherine Parry	f25bb4a384	radix-4 early termination working for special cases - not working completely	2022-06-27 20:43:55 +00:00
Katherine Parry	a65c0eb679	radix 4 division denormal result handeling	2022-06-24 21:02:50 +00:00
Katherine Parry	d058ec6329	added denormal input handeling - radix 4	2022-06-24 19:41:40 +00:00
Katherine Parry	b54d84195f	added radix-4 0/d handling	2022-06-23 22:36:19 +00:00
Katherine Parry	5133b08161	generate qsel4 in verilog	2022-06-23 21:38:04 +00:00
James Stine	79bf543ba9	Update	2022-06-23 11:59:05 -05:00
James Stine	001e8e077d	Add sqrt qlsc table generator	2022-06-23 11:46:44 -05:00
Katherine Parry	49067792dc	fixt lint error	2022-06-23 16:11:50 +00:00
Katherine Parry	4a6dee5926	Testfloat running division - not passing	2022-06-23 00:07:34 +00:00
Katherine Parry	e9f5778e2a	using memread for quotent select	2022-06-21 15:49:52 -07:00
James Stine	493d3b1ac0	Add hex output in bad but okay way	2022-06-21 15:07:24 -05:00
James Stine	8e177b02e4	Add MATLAB scripts for PD plot	2022-06-21 10:14:53 -05:00
Katherine Parry	edc15d6ef9	made fixes to radix-2 divider testbench - divider doesn't pass	2022-06-20 23:01:53 +00:00
Katherine Parry	5d5f79eb8f	radix-4 divider passing tests	2022-06-20 22:56:08 +00:00
Katherine Parry	254ebf478e	added fld in rv32 - needs testing	2022-06-20 22:53:13 +00:00
James Stine	1108268557	Update C program for r=4 division by recurrence to match Table in EL	2022-06-20 11:32:40 -05:00
James Stine	d69a8f4077	Add back SV for integer division to use 8-bit CPA in qslc	2022-06-15 11:46:39 -05:00
James Stine	535a9a04ee	Add r=4 C code	2022-06-15 11:44:09 -05:00
David Harris	be65e8f862	Removed SRT testvectors from repo	2022-06-13 19:27:33 +00:00
stineje	470c0552f8	Update integer division for r4 and qslc_r4a2.c	2022-06-09 16:45:13 -05:00
David Harris	dd4fa7c682	qslc_r4a2 generator	2022-06-09 17:26:47 +00:00
cturek	afdfe770fc	Added integer division in srt, parametrized everything to work with integers and floating points, parametrized testbench.	2022-06-04 00:14:10 +00:00
cturek	949f53695d	Fixed typos	2022-06-01 00:07:36 +00:00
David Harris	b04e9ac1f6	fixed merge conflicts	2022-05-28 09:44:55 +00:00
David Harris	4237bb7abd	Added comments to some files, added a+b = 0 detector to comparator.sv	2022-05-28 09:41:48 +00:00
cturek	5a0889016c	fixed sizing issues in expcalc	2022-05-26 22:35:17 +00:00
cturek	3301d7c52a	Implemented on-the-fly conversion for unsigned numbers	2022-05-26 22:20:43 +00:00
cturek	4a4f153eef	Set up the divider for on-the-fly conversion	2022-05-26 16:45:28 +00:00
cturek	c9845b96f4	Renamed variables for readability	2022-05-26 00:01:51 +00:00
cturek	51debfa186	Fixed exponent verification, added sign module and added sign tests	2022-05-25 23:36:21 +00:00
Katherine Parry	576fe4ec24	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-05-23 23:11:41 +00:00
Katherine Parry	e5d2dfe94b	added exponents to srt divider	2022-05-23 23:07:27 +00:00
David Harris	d78451e39c	Checked in qst2.c from James	2022-05-23 20:26:05 +00:00
David Harris	49f25bd03d	Restored srt to working without exponent unit	2022-05-17 15:09:48 +00:00
David Harris	1bcbdcf57d	removed exptestgen	2022-05-17 00:06:44 +00:00
David Harris	ea3e7006d9	Cleaned up unpacker changes in srt and lint errors	2022-05-17 00:06:14 +00:00
David Harris	329fea9329	Renamed unpacking unit to unpack and renamed WriteDataW to ResultW in IEU datapath	2022-02-28 20:50:51 +00:00
ushakya22	5f916d17d2	Moved order of reading a, b, and result from test vectors file so that result ... matches up with inputs a and b	2022-02-21 17:28:11 +00:00
ushakya22	3abc2c0592	- created new testbench file instead of having it at the bottom of the srt file ... - uses unpacker to parse 64 bit floating point numbers - updated testbench to read from new testvectors generated by exptestbench Notes: MEM_WIDTH updated to be 64*3 Input numbers and output result is 64 bit number MEM_SIZE set to 60000	2022-02-21 16:24:50 +00:00
ushakya22	1ea3e8120a	- Created exponent divsion module ... - top module includes exponent module now Notes: - may be a better implementation of the exponent module rather than having what I believe are two adders currently	2022-02-21 16:13:30 +00:00
ushakya22	3d5b407755	Changed Makefile to compile exptestgen instead of testgen	2022-02-21 16:08:45 +00:00
ushakya22	ec3fa45f86	reverted srt_standford back to original file pre modifications by Udeema	2022-02-21 16:08:09 +00:00
ushakya22	ed452aff5f	verilator lint for srt	2022-02-21 16:05:43 +00:00
ushakya22	a3a572fe5f	Created test vector generation file for exponent and mantissa division	2022-02-21 16:04:41 +00:00
David Harris	dee2822359	srt fixes	2022-02-14 18:40:27 +00:00
David Harris	99aacd5aca	srt batch files	2022-02-14 18:37:46 +00:00
ushakya22	4170b54c28	work in progress exponent handling	2022-02-14 18:24:29 +00:00