Commit Graph

260 Commits

Author SHA1 Message Date
Jacob Pease
356a0dbdde Makefile dynamically generates all device tree files now. 2023-08-04 13:56:03 -05:00
Jacob Pease
9d5fb35ca5 Added device tree generation to Linux directory Makefile. Exits on not finding output/images folder in buildroot directory. 2023-08-02 19:26:35 -05:00
Jacob Pease
057d9e47e3 Updated linux config. Works in QEMU now. 2023-08-02 18:59:42 -05:00
Ross Thompson
fcf9adae8c Merge branch 'main' of github.com:ross144/cvw 2023-08-02 16:51:42 -05:00
Ross Thompson
cab40e618f Updateds to vcu118 constraints and device tree. 2023-08-02 16:51:32 -05:00
Jacob Pease
4084a11350 Adjusted the new makefile. 2023-08-02 16:24:20 -05:00
Jacob Pease
064e863476 Buildroot can now be set up with the new Linux Makefile. The driver can now also be loaded from addins/vivado-risc-v and should be removed from the main Wally repo. A sed command customizes the package source location for the new buildroot directory. 2023-08-02 16:12:26 -05:00
Jacob Pease
e0a63f79ce Removed duplicate line in Makefile. 2023-08-02 14:59:20 -05:00
Jacob Pease
7c1d7b07bb Linux makefile now copies the package contents with the correct package source. 2023-08-02 14:56:23 -05:00
Jacob Pease
068a0d10fd Added a Makefile to the Linux directory to take care of the Buildroot setup and other dependencies. 2023-08-02 14:28:17 -05:00
Ross Thompson
83bb99756b Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-08-01 12:57:20 -05:00
Jacob Pease
337f5fadc7 Updated driver for latest version of linux 2023-08-01 12:56:16 -05:00
Ross Thompson
2a0b307608 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-08-01 11:04:26 -05:00
Jacob Pease
3deff32639 Updated linux and buildroot configs initial commit. 2023-08-01 10:55:46 -05:00
Ross Thompson
06efd2cdde Pushed performance of arty a7 to 23Mhz. 2023-07-31 14:13:09 -05:00
Jacob Pease
55055aa0a8 Updated VCU108 device tree for 256MB memory. 2023-07-27 17:44:31 -05:00
Ross Thompson
dbf9e5da0b Updated Arty A7 fpga config and device tree to 256MiB main memory. 2023-07-25 15:11:47 -05:00
Ross Thompson
e99c6e5e1d Updated arty a7 device clock speed for 20Mhz. 2023-07-24 11:50:00 -05:00
Ross Thompson
49b87d4550 Merge branch 'main' of github.com:ross144/cvw 2023-07-24 10:47:05 -05:00
Ross Thompson
065e5e98c9 Improved timing constraints for arty a7 to push clock speed to 20Mhz. 2023-07-24 10:46:49 -05:00
Ross Thompson
481f27e3fe Updated arty a7 device tree. 2023-07-21 19:08:45 -05:00
Ross Thompson
ab6ef5bb58 At least it simulates and gets through fpga elaboration. 2023-07-21 18:40:26 -05:00
Ross Thompson
a89a1e675c Merge branch 'boot' into mergeBoot
Merges Jacob's new sdc controller into wally.
2023-07-21 17:43:45 -05:00
Ross Thompson
d04d2afed2 Modified the LSU/IFU and caches to improve critical path. Arty A7 went from 15 to 17Mhz. I believe we can push all the way to 20+Mhz with relatively little effort. Along the way I'm fixing up the scripts build the linux images for the flash card. 2023-07-21 13:06:27 -05:00
Jacob Pease
380d96b359 Working new boot process. Buildroot package for sdc. 2023-07-20 14:15:59 -05:00
Ross Thompson
b756b248b4 Wow. The newest version of Vivado does not like the enums as parameters.
The solution is simple.  I changed the type to logic [31:0] and defined macros for the branch predictor types as 32 bit integers.
2023-07-18 15:07:10 -05:00
Ross Thompson
d1ea52f6ea Added artya7 device tree. 2023-07-17 16:01:02 -05:00
Jacob Pease
b3aaa87cba Modified bootloader to access GUID partitions. SDC interrupt to PLIC.
Since writing an SD card image generation script, the bootloader
needed to be altered to access individual binaries from specific
partitions. A new file, gpt.c with it's header gpt.h, have been added
to the bootloader to facilitate this.

The SDC has been added to the device tree for the VCU108
board. Additionally the SDC interrupt signal was added to the PLIC
node in the device tree. The PLIC itself  was modified to accept the
SDC interrupt signal.
2023-07-14 13:36:44 -05:00
Ross Thompson
cf00f85456 Updated vcu118 constraints to run cpu at 38.43Mhz. 2022-11-15 10:19:38 -06:00
Ross Thompson
cc80f1f7b2 Bumped DDR4 clock speed up from 832Mhz (1666 MT/s) to 1200 Mhz (2400 MT/s).
Increased CPU clock speed from 30 Mhz to 35 Mhz.
2022-11-11 15:33:03 -06:00
Ross Thompson
d58a862f59 Added new device trees for vcu118 and vcu108 boards. 2022-10-24 17:45:10 -05:00
Ross Thompson
897982400c Updated the device tree to use 30Mhz instead of 10Mhz for the cpu timebase. 2022-10-20 15:05:39 -05:00
slmnemo
a5d5bd272b changes suggested by ben, hopefully fixing buildroot (which is now not running) 2022-05-20 18:42:38 -07:00
bbracker
871f63374e upgrade Buildroot Makefile to also copy over vmlinux 2022-04-25 07:36:59 -07:00
bbracker
27920d3504 less hardcoded paths in Makefile 2022-04-21 20:42:02 -07:00
David Harris
5c607f2b6b Simplified profile for UART boot; added warnings on UART Rx errors 2022-04-21 04:54:45 +00:00
bbracker
3aec080e15 parsePlicState.py bugfix 2022-04-13 13:04:43 -07:00
bbracker
52ed99ca1b improve testbench-linux.sv to correctly load in PLIC IntEnable checkpoint and to handle edge case where interrupt is caused by enabling interrupts in SSTATUS 2022-04-13 03:37:53 -07:00
bbracker
6c56f52e7c fix bugs in PLIC checkpoint state parsing 2022-04-13 01:59:21 -07:00
bbracker
777de6e05b whoops fix address for PLIC int enables in checkpoint generation 2022-04-13 01:36:09 -07:00
bbracker
3c1deb551d deprecate remove_dup.awk in favor of expanding parseGDBtoTrace.py to internally remove duplicates; this way the instruction counts in traps.txt are hopefully now in sync with the line numbers of all.txt 2022-04-07 19:43:22 -07:00
bbracker
1e5e2704f7 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-04-07 08:37:44 -07:00
bbracker
95438fca0d fix parseQEMUtoGDB.py to pass on interrupt messages correctly 2022-04-07 04:47:15 -07:00
kaveh Pezeshki
7b85b39c48 using -S for busybox objdump to provide source code snippets 2022-04-06 23:06:49 +00:00
bbracker
241ec053e8 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-04-06 07:50:57 -07:00
bbracker
c9c75d2e3e filter traps list down to just interrupts 2022-04-06 07:49:44 -07:00
bbracker
241100c6ac change RAM size in genInitMem.sh 2022-04-06 07:49:04 -07:00
David Harris
c22d6f2848 Added bootmem source ccode 2022-04-05 23:22:53 +00:00
David Harris
4f7c37e406 Changed Linux disassembly to -S to preserve source code lines 2022-04-01 16:49:13 +00:00
bbracker
6fc54435c5 checkpointSweep is bash-specific, so add shebang to make it so 2022-03-28 13:40:50 -07:00
bbracker
2900117341 fix genCheckpoint.sh binary memory dump 2022-03-27 20:54:59 -07:00
bbracker
6b812f33e1 change genCheckpoint.sh to only log 128MB of RAM 2022-03-27 19:16:39 -07:00
bbracker
284f1ab75e fix parseGDBtoTrace.py to expect the CSRs that QEMU actually prints out 2022-03-27 19:05:44 -07:00
bbracker
d1e4b61aa3 refactored buildroot configuration 2022-03-27 15:13:03 -07:00
bbracker
6b2474a306 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-03-27 15:11:42 -07:00
bbracker
3dcb87473b change devicetree to expect only 128MB of RAM 2022-03-27 15:11:36 -07:00
bbracker
b08066381a fix multiple-context PLIC checkpoint generation 2022-03-25 01:02:22 +00:00
bbracker
9f60256f22 1st attempt at multiple channel PLIC 2022-03-24 17:08:10 -07:00
Ross Thompson
7fc128ba7c added SIP, SIE, and SSTATUS to checkpoints. Can't seem to get the linux testbench to force SIP. 2022-03-22 21:28:34 -05:00
bbracker
e3303331ef change genTrace to dump UART output to file so we can see how far parsing got 2022-03-08 09:52:17 -08:00
bbracker
51e68819c4 fix up PLIC and UART checkpointing 2022-03-07 23:48:47 -08:00
bbracker
9dbcdca433 change UART state saving to temporarily modify LCR so that DLAB=0 when reading addresses 0 and 1 so that we get RBR and IER instead of divisor latch registers 2022-03-07 22:12:08 -08:00
bbracker
52bfd65fd3 change checkpoint generation to integrate GDB scripting more cleanly and save UART and PLIC state 2022-03-07 17:59:49 -08:00
bbracker
a93f36824d modify debug.sh to not rely on external GDB script 2022-03-07 11:56:04 -08:00
bbracker
74ff583f9b add debug.sh 2022-03-07 19:52:19 +00:00
bbracker
01eeab2131 update checkpointSweep in accordance to having removed trace parsing feature 2022-03-06 14:55:51 -08:00
bbracker
c432e2175e remove vestigial silencePipe mechanism 2022-03-06 14:54:35 -08:00
bbracker
ca6bb7c2d2 needed to initialize checkpoint directory 2022-03-06 14:51:25 -08:00
bbracker
6b1b471ca6 no longer use cythonization on python parser scripts because its a little complicated and has marginal benefit 2022-03-06 14:40:26 -08:00
bbracker
2e6fa01b9b give genCheckpoint the same de-sudo'ing treatement 2022-03-06 14:37:12 -08:00
bbracker
675e112950 better to use $tvDir variable rather than abs path 2022-03-06 14:33:53 -08:00
bbracker
8720604bfc replace sudo's with suggestions in genRecording.sh 2022-03-06 14:31:55 -08:00
bbracker
3e4ce15ea4 replace sudo's in genTrace.sh with suggested commands 2022-03-06 14:24:50 -08:00
bbracker
3e1f4decf1 small bugfix to suggested sudo commands for linux testvectors 2022-03-06 14:16:23 -08:00
bbracker
228f693f13 remove checkpoint trace generation since that requires qemu hacking and because we are able to generate the whole trace on VLSI 2022-03-06 14:04:30 -08:00
bbracker
f86e76a4b1 recommend sudo commands without automatically executing them in genInitMem.sh 2022-03-06 13:30:19 -08:00
bbracker
a0d0742227 change from clang to gcc when compiling testvector-generation executables 2022-03-06 13:18:53 -08:00
bbracker
94124cb108 add extractFunctionRadix step to buildroot Makefile 2022-03-05 19:02:07 -08:00
bbracker
9f7a434b20 change genInitMem.sh to check for sufficient directory privileges rather than invoke sudo 2022-03-05 18:04:00 -08:00
bbracker
e994f70dab change main.config so that buildroot expects linux.config and busybox.config to be at $RISCV/buildroot 2022-03-02 17:46:33 +00:00
bbracker
29086ea393 checkpoint sweep script -- not sure if this deserves to be on the repo in the long run, but it is helpful 2022-03-01 03:48:31 +00:00
bbracker
dd4882ab27 copy over truncated trace into checkpoint if not freshly generating a trace 2022-03-01 03:38:48 +00:00
bbracker
5c11ff2a72 add option to not generate a trace when making checkpoints 2022-03-01 03:13:01 +00:00
bbracker
34d44772d5 script for dumping out QEMU ram and bootrom state at ground 0 2022-03-01 01:45:09 +00:00
bbracker
ba5abd1297 typo fix to checkpoint generator 2022-03-01 00:51:54 +00:00
bbracker
8321c76d95 greatly improve trace-generating checkpoint process with QEMU hack 2022-02-28 23:00:00 +00:00
bbracker
8f2a533470 change pipe silencer to redirect to stderr so that we can see if QEMU is at least still alive 2022-02-28 22:55:23 +00:00
bbracker
e3858c7008 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-25 23:51:48 +00:00
bbracker
e9e358cdd0 revived checkpointing and hacked it up to generate a trace starting at the checkpoint 2022-02-25 23:51:40 +00:00
bbracker
c1a50b38c3 parser rename 2022-02-25 20:05:10 +00:00
kaveh Pezeshki
83f88eaebd Updated busybox disassembly 2022-02-24 04:49:04 +00:00
kaveh Pezeshki
da35effadd removed verbose cpio and excluded /dev/console 2022-02-24 00:08:10 +00:00
David Harris
2af34f67f4 Linux disassembly makefile 2022-02-24 00:05:23 +00:00
bbracker
a6047697c3 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-22 04:27:50 +00:00
bbracker
80e03fe42f new trace generation method 2022-02-21 20:30:39 +00:00
kaveh Pezeshki
430f1eca6c added Makefile for automated disassembly generation 2022-02-20 09:08:38 +00:00
bbracker
05dd37d3d6 rename dump-dts debug script 2022-02-10 00:10:09 +00:00
bbracker
f823338597 continue to rename devicetree to wally-virt 2022-02-10 00:08:28 +00:00
bbracker
62d1ed65d4 rename devicetree to wally-virt 2022-02-10 00:07:29 +00:00
bbracker
440cac9f77 minor interrupt syntax fix 2022-02-09 02:56:39 +00:00
bbracker
84ffdfc8c4 add tracegen support for interrupt parsing 2022-02-09 02:29:47 +00:00
bbracker
61f2ae929b update buildroot main.config to reflect most recent image build 2022-02-08 11:47:26 +00:00
bbracker
9ee4b39b01 restore trace generation functionality for new setup 2022-02-08 11:45:42 +00:00
bbracker
b165fe3937 add trimmed-down virt devicetree to repo for QEMU 2022-02-08 11:11:44 +00:00
bbracker
775e07d69a trying to move away from QEMU patches 2022-02-08 10:05:38 +00:00
bbracker
26f2c139e6 fix typo 2022-02-08 08:12:45 +00:00
bbracker
8688c457cb add buildroot script 2022-02-08 08:10:32 +00:00
bbracker
929a9f0f1d refactor buildroot-config-src into linux folder 2022-02-08 00:26:06 +00:00
bbracker
ea92cc3af2 a different approach to QEMU: add Wally as a completely new machine 2022-01-26 15:02:24 +00:00
David Harris
ab25aa4df9 Created linux directory for linux config 2022-01-20 00:04:23 +00:00