forked from Github_Repos/cvw
350 lines
30 KiB
Plaintext
350 lines
30 KiB
Plaintext
onerror {resume}
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quietly WaveActivateNextPane {} 0
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add wave -noupdate /testbench/clk
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add wave -noupdate /testbench/reset
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add wave -noupdate /testbench/memfilename
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add wave -noupdate -expand -group {Execution Stage} /testbench/FunctionName/FunctionName/FunctionName
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add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/PCE
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add wave -noupdate -expand -group {Execution Stage} /testbench/InstrEName
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add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/InstrE
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/InstrMisalignedFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/InstrAccessFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/IllegalInstrFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/BreakpointFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/LoadMisalignedFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/StoreMisalignedFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/LoadAccessFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/StoreAccessFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/EcallFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/InstrPageFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/LoadPageFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/StorePageFaultM
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add wave -noupdate -expand -group HDU -group traps /testbench/dut/hart/priv/trap/InterruptM
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/BPPredWrongE
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/RetM
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/TrapM
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/LoadStallD
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/ICacheStallF
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/DCacheStall
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/MulDivStallD
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add wave -noupdate -expand -group HDU -group Flush -color Yellow /testbench/dut/hart/hzu/FlushF
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add wave -noupdate -expand -group HDU -group Flush -color Yellow /testbench/dut/hart/FlushD
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add wave -noupdate -expand -group HDU -group Flush -color Yellow /testbench/dut/hart/FlushE
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add wave -noupdate -expand -group HDU -group Flush -color Yellow /testbench/dut/hart/FlushM
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add wave -noupdate -expand -group HDU -group Flush -color Yellow /testbench/dut/hart/FlushW
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallF
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallD
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallE
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallM
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallW
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add wave -noupdate -group Bpred -color Orange /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHR
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/BPPredF
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} {/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/InstrClassE[0]}
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} {/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/BPInstrClassE[0]}
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/BPPredDirWrongE
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} -divider {class check}
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/BPClassRightNonCFI
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/BPClassWrongCFI
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/BPClassWrongNonCFI
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/BPClassRightBPRight
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/BPClassRightBPWrong
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add wave -noupdate -group Bpred -radix hexadecimal -childformat {{{/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[6]} -radix binary} {{/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[5]} -radix binary} {{/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[4]} -radix binary} {{/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[3]} -radix binary} {{/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[2]} -radix binary} {{/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[1]} -radix binary} {{/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[0]} -radix binary}} -subitemconfig {{/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[6]} {-height 16 -radix binary} {/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[5]} {-height 16 -radix binary} {/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[4]} {-height 16 -radix binary} {/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[3]} {-height 16 -radix binary} {/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[2]} {-height 16 -radix binary} {/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[1]} {-height 16 -radix binary} {/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel[0]} {-height 16 -radix binary}} /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRMuxSel
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add wave -noupdate -group Bpred /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRNext
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add wave -noupdate -group Bpred /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRUpdateEN
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add wave -noupdate -group Bpred /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/PHTUpdateAdr
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add wave -noupdate -group Bpred /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/PHTUpdateAdr0
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add wave -noupdate -group Bpred /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/PHTUpdateAdr1
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add wave -noupdate -group Bpred /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/PHTUpdateEN
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add wave -noupdate -group Bpred -expand -group prediction /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHRLookup
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add wave -noupdate -group Bpred -expand -group prediction /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/PCNextF
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add wave -noupdate -group Bpred -expand -group prediction /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/PHT/RA1
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add wave -noupdate -group Bpred -expand -group prediction -radix binary /testbench/dut/hart/ifu/bpred/bpred/BPPredF
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add wave -noupdate -group Bpred -expand -group prediction /testbench/dut/hart/ifu/bpred/bpred/BTBValidF
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add wave -noupdate -group Bpred -expand -group prediction /testbench/dut/hart/ifu/bpred/bpred/BPInstrClassF
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add wave -noupdate -group Bpred -expand -group prediction /testbench/dut/hart/ifu/bpred/bpred/BTBPredPCF
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add wave -noupdate -group Bpred -expand -group prediction /testbench/dut/hart/ifu/bpred/bpred/RASPCF
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add wave -noupdate -group Bpred -expand -group prediction /testbench/dut/hart/ifu/bpred/bpred/TargetPredictor/LookUpPCIndex
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add wave -noupdate -group Bpred -expand -group prediction /testbench/dut/hart/ifu/bpred/bpred/TargetPredictor/TargetPC
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add wave -noupdate -group Bpred -expand -group prediction -expand -group ex -radix binary /testbench/dut/hart/ifu/bpred/bpred/BPPredE
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add wave -noupdate -group Bpred -expand -group prediction -expand -group ex /testbench/dut/hart/ifu/bpred/bpred/PCSrcE
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add wave -noupdate -group Bpred -expand -group prediction -expand -group ex /testbench/dut/hart/ifu/bpred/bpred/BPPredDirWrongE
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add wave -noupdate -group Bpred -expand -group update -expand -group BTB /testbench/dut/hart/ifu/bpred/bpred/TargetPredictor/UpdatePCIndex
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add wave -noupdate -group Bpred -expand -group update -expand -group BTB /testbench/dut/hart/ifu/bpred/bpred/TargetPredictor/UpdateTarget
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add wave -noupdate -group Bpred -expand -group update -expand -group BTB /testbench/dut/hart/ifu/bpred/bpred/TargetPredictor/UpdateEN
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add wave -noupdate -group Bpred -expand -group update -expand -group BTB /testbench/dut/hart/ifu/bpred/bpred/TargetPredictor/UpdatePC
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add wave -noupdate -group Bpred -expand -group update -expand -group BTB /testbench/dut/hart/ifu/bpred/bpred/TargetPredictor/UpdateTarget
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add wave -noupdate -group Bpred -expand -group update -expand -group direction /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/PHTUpdateAdr
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add wave -noupdate -group Bpred -expand -group update -expand -group direction /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/PCE
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add wave -noupdate -group Bpred -expand -group update -expand -group direction /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/PHT/WA1
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add wave -noupdate -group Bpred -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/bpred/TargetWrongE
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add wave -noupdate -group Bpred -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/bpred/FallThroughWrongE
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add wave -noupdate -group Bpred -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/bpred/PredictionPCWrongE
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add wave -noupdate -group Bpred -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/bpred/InstrClassE
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add wave -noupdate -group Bpred -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/bpred/PredictionInstrClassWrongE
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add wave -noupdate -group Bpred -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/bpred/BPPredClassNonCFIWrongE
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add wave -noupdate -group Bpred -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/bpred/BPPredWrongE
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add wave -noupdate -group Bpred /testbench/dut/hart/ifu/bpred/bpred/BPPredWrongE
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add wave -noupdate -expand -group {instruction pipeline} /testbench/InstrFName
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add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrD
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add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrE
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add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrM
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add wave -noupdate -expand -group {instruction pipeline} /testbench/InstrW
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add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNextF
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add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCF
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add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCPlus2or4F
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add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredPCF
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add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext0F
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add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext1F
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add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/SelBPPredF
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add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredWrongE
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add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PrivilegedChangePCM
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add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ifu/InstrD
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add wave -noupdate -group {Decode Stage} /testbench/InstrDName
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add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/c/RegWriteD
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add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/dp/RdD
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add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/dp/Rs1D
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add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/dp/Rs2D
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add wave -noupdate -group RegFile -expand /testbench/dut/hart/ieu/dp/regf/rf
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add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/a1
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add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/a2
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add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/a3
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add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/rd1
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add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/rd2
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add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/we3
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add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/wd3
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ALUResultW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ReadDataW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/CSRReadValW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultSrcW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultW
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/a
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/b
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/alucontrol
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/result
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/flags
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add wave -noupdate -group alu -divider internals
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/overflow
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/carry
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/zero
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/neg
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/lt
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/ltu
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add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1D
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add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs2D
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add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1E
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add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs2E
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add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RdE
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add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RdM
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add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RdW
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add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/MemReadE
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add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RegWriteM
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add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RegWriteW
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add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/ForwardAE
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add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/ForwardBE
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add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/LoadStallD
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add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/WriteDataE
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add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/ALUResultE
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add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcAE
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add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcBE
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add wave -noupdate -group PCS /testbench/dut/hart/ifu/PCNextF
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add wave -noupdate -group PCS /testbench/dut/hart/PCF
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add wave -noupdate -group PCS /testbench/dut/hart/ifu/PCD
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add wave -noupdate -group PCS /testbench/dut/hart/PCE
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add wave -noupdate -group PCS /testbench/dut/hart/PCM
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add wave -noupdate -group PCS /testbench/PCW
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/InstrD
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/SrcAE
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/SrcBE
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/Funct3E
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/MulDivE
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/W64E
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/StallM
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/StallW
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/FlushM
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/FlushW
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/MulDivResultW
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/genblk1/div/start
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/DivDoneE
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add wave -noupdate -group muldiv /testbench/dut/hart/mdu/DivBusyE
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add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/fsm1/CURRENT_STATE
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add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/N
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add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/D
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add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/Q
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add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/rem0
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add wave -noupdate -group icache -color Orange /testbench/dut/hart/ifu/icache/controller/CurrState
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add wave -noupdate -group icache /testbench/dut/hart/ifu/icache/controller/NextState
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add wave -noupdate -group icache /testbench/dut/hart/ifu/ITLBMissF
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add wave -noupdate -group icache /testbench/dut/hart/ifu/icache/ITLBWriteF
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add wave -noupdate -group icache -group {tag read} /testbench/dut/hart/ifu/icache/cachemem/DataValidBit
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add wave -noupdate -group icache -group {tag read} /testbench/dut/hart/ifu/icache/cachemem/cachetags/ReadData
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/hit
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/spill
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/ICacheStallF
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/SavePC
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/spillSave
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/UnalignedSelect
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/PCMux
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/spillSave
|
|
add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/CntReset
|
|
add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/PreCntEn
|
|
add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/CntEn
|
|
add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/NUMLINES
|
|
add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/BLOCKLEN
|
|
add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/BLOCKBYTELEN
|
|
add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/OFFSETLEN
|
|
add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/INDEXLEN
|
|
add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/TAGLEN
|
|
add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/FetchCountFlag
|
|
add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/FetchCount
|
|
add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrPAdrF
|
|
add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrReadF
|
|
add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrAckF
|
|
add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrInF
|
|
add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/ICacheMemWriteEnable
|
|
add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/ICacheMemWriteData
|
|
add wave -noupdate -group icache -expand -group memory -group {tag write} /testbench/dut/hart/ifu/icache/cachemem/WriteEnable
|
|
add wave -noupdate -group icache -expand -group memory -group {tag write} /testbench/dut/hart/ifu/icache/cachemem/WriteLine
|
|
add wave -noupdate -group icache -expand -group memory -group {tag write} /testbench/dut/hart/ifu/icache/cachemem/cachetags/StoredData
|
|
add wave -noupdate -group icache -expand -group {instr to cpu} /testbench/dut/hart/ifu/icache/controller/FinalInstrRawF
|
|
add wave -noupdate -group icache -expand -group pc /testbench/dut/hart/ifu/icache/controller/PCPF
|
|
add wave -noupdate -group icache -expand -group pc /testbench/dut/hart/ifu/icache/controller/PCPreFinalF
|
|
add wave -noupdate -group AHB -expand -group read /testbench/dut/hart/ebu/HRDATA
|
|
add wave -noupdate -group AHB -expand -group read /testbench/dut/hart/ebu/HRDATAMasked
|
|
add wave -noupdate -group AHB -expand -group read /testbench/dut/hart/ebu/HRDATANext
|
|
add wave -noupdate -group AHB -color Gold /testbench/dut/hart/ebu/BusState
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/ProposedNextBusState
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/NextBusState
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/DSquashBusAccessM
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/ISquashBusAccessF
|
|
add wave -noupdate -group AHB -expand -group {input requests} /testbench/dut/hart/ebu/AtomicMaskedM
|
|
add wave -noupdate -group AHB -expand -group {input requests} /testbench/dut/hart/ebu/MemReadM
|
|
add wave -noupdate -group AHB -expand -group {input requests} /testbench/dut/hart/ebu/MemWriteM
|
|
add wave -noupdate -group AHB -expand -group {input requests} /testbench/dut/hart/ebu/InstrReadF
|
|
add wave -noupdate -group AHB -expand -group {input requests} /testbench/dut/hart/ebu/MemSizeM
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HCLK
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HRESETn
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HRDATA
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HRDATANext
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HREADY
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HRESP
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HADDR
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HWDATA
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HWRITE
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HSIZE
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HBURST
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HPROT
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HTRANS
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HMASTLOCK
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HADDRD
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HSIZED
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/HWRITED
|
|
add wave -noupdate -group AHB /testbench/dut/hart/ebu/StallW
|
|
add wave -noupdate -expand -group lsu -color Gold /testbench/dut/hart/lsu/CurrState
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/DisableTranslation
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/MemRWM
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/MemAdrM
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/MemPAdrM
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/ReadDataW
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/WriteDataM
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/AtomicMaskedM
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/DSquashBusAccessM
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/HRDATAW
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/MemAckW
|
|
add wave -noupdate -expand -group lsu /testbench/dut/hart/lsu/StallW
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HCLK
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HSELPLIC
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HADDR
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HWRITE
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HREADY
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HTRANS
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HWDATA
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/UARTIntr
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/GPIOIntr
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HREADPLIC
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HRESPPLIC
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HREADYPLIC
|
|
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/ExtIntM
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/HCLK
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/HSELGPIO
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/HADDR
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/HWDATA
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/HWRITE
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/HREADY
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/HTRANS
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/HREADGPIO
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/HRESPGPIO
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/HREADYGPIO
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/GPIOPinsIn
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/GPIOPinsOut
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/GPIOPinsEn
|
|
add wave -noupdate -group GPIO /testbench/dut/uncore/genblk3/gpio/GPIOIntr
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/HCLK
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/HSELCLINT
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/HADDR
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/HWRITE
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/HWDATA
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/HREADY
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/HTRANS
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/HREADCLINT
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/HRESPCLINT
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/HREADYCLINT
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/MTIME
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/MTIMECMP
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/TimerIntM
|
|
add wave -noupdate -group CLINT /testbench/dut/uncore/genblk1/clint/SwIntM
|
|
add wave -noupdate -expand -group ptwalker -divider data
|
|
add wave -noupdate -group csr /testbench/dut/hart/priv/csr/MIP_REGW
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/HCLK
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/HRESETn
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/HSELUART
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/HADDR
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/HWRITE
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/HWDATA
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/HREADUART
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/HRESPUART
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/HREADYUART
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/SIN
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/DSRb
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/DCDb
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/CTSb
|
|
add wave -noupdate -group uart /testbench/dut/uncore/genblk4/uart/RIb
|
|
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/SOUT
|
|
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/RTSb
|
|
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/DTRb
|
|
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/OUT1b
|
|
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/OUT2b
|
|
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/INTR
|
|
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/TXRDYb
|
|
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/RXRDYb
|
|
add wave -noupdate -group dtlb /testbench/dut/hart/lsu/dmmu/TLBMiss
|
|
add wave -noupdate -group dtlb /testbench/dut/hart/lsu/dmmu/tlb/TLBWrite
|
|
add wave -noupdate -group itlb /testbench/dut/hart/ifu/ITLBMissF
|
|
add wave -noupdate /testbench/dut/hart/lsu/dmmu/tlb/DisableTranslation
|
|
add wave -noupdate -group tlbread /testbench/dut/hart/lsu/dmmu/tlb/VirtualAddress
|
|
add wave -noupdate -group tlbread /testbench/dut/hart/lsu/dmmu/tlb/tlbcam/CAMHit
|
|
add wave -noupdate -group tlbread /testbench/dut/hart/lsu/dmmu/tlb/tlbcam/VPNIndex
|
|
add wave -noupdate -group tlbread /testbench/dut/hart/lsu/dmmu/tlb/tlbcam/HitPageType
|
|
add wave -noupdate -group tlbread /testbench/dut/hart/lsu/dmmu/tlb/tlbcam/VirtualPageNumber
|
|
add wave -noupdate -group tlbwrite /testbench/dut/hart/lsu/dmmu/tlb/tlbcam/TLBWrite
|
|
add wave -noupdate -group tlbwrite /testbench/dut/hart/lsu/dmmu/tlb/PTEWriteVal
|
|
add wave -noupdate -group tlbwrite /testbench/dut/hart/lsu/dmmu/tlb/tlbcam/WriteLines
|
|
TreeUpdate [SetDefaultTree]
|
|
WaveRestoreCursors {{Cursor 8} {4545 ns} 0} {{Cursor 3} {2540 ns} 0} {{Cursor 4} {681 ns} 0}
|
|
quietly wave cursor active 2
|
|
configure wave -namecolwidth 250
|
|
configure wave -valuecolwidth 189
|
|
configure wave -justifyvalue left
|
|
configure wave -signalnamewidth 1
|
|
configure wave -snapdistance 10
|
|
configure wave -datasetprefix 0
|
|
configure wave -rowmargin 4
|
|
configure wave -childrowmargin 2
|
|
configure wave -gridoffset 0
|
|
configure wave -gridperiod 1
|
|
configure wave -griddelta 40
|
|
configure wave -timeline 0
|
|
configure wave -timelineunits ns
|
|
update
|
|
WaveRestoreZoom {2313 ns} {2789 ns}
|