Ross Thompson d2272c0620 Found and fixed the major architecture issue with the mig 7 used in the arty a7 board. ... mig 7 is completely different from the ddr4 mig in that the internal pll does not general the required clocks. An external mmcm is required to general two inputs clocks and the required user clock.		2023-04-15 11:13:28 -05:00
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debug	Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile.	2022-10-24 15:38:39 -05:00
bootrom.txt	Added bootrom.txt.	2022-03-30 17:29:48 -05:00
insert_debug_comment.sh	Updated fpga constraints.	2023-01-20 20:16:33 -06:00
Makefile	Progress on arty a7 board.	2023-04-13 17:57:12 -05:00
probe	Added Jacob's ILA script.	2023-04-06 15:32:36 -05:00
wally.tcl	Found and fixed the major architecture issue with the mig 7 used in the arty a7 board.	2023-04-15 11:13:28 -05:00
wave_config.wcfg	Updated fpga wave configuration.	2022-11-16 15:57:19 -06:00
xlnx_ahblite_axi_bridge.tcl	Added more support for Arty A7 board.	2023-04-10 16:01:17 -05:00
xlnx_axi_clock_converter.tcl	Added more support for Arty A7 board.	2023-04-10 16:01:17 -05:00
xlnx_ddr3-artya7-mig.prj	Updates for arty a7.	2023-04-10 17:02:19 -05:00
xlnx_ddr3-ArtyA7.tcl	Finally fixed the ddr3 mig script to work correclty.	2023-04-14 11:41:51 -05:00
xlnx_ddr4-vcu108.tcl	Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile.	2022-10-24 15:38:39 -05:00
xlnx_ddr4-vcu118.tcl	Updated vcu118 constraints to run cpu at 38.43Mhz.	2022-11-15 10:19:38 -06:00
xlnx_ddr4.tcl	Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile.	2022-10-24 15:38:39 -05:00
xlnx_mmcm.tcl	Realized we need a separate mmcm when using the mig 7 for ddr3 rather than the ddr4 mig. Go figure.	2023-04-14 18:02:16 -05:00
xlnx_proc_sys_reset.tcl	Added more support for Arty A7 board.	2023-04-10 16:01:17 -05:00