Ross Thompson ac94b55e74 Fixed minor bug in PLIC. reading interrupt source 0 should not return x. it should provide produce 0. ... Switched to even simplier PC+2/4 logic.		2022-12-21 09:00:09 -06:00
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config	Removed CSR support from rv32i	2022-12-19 16:15:12 -08:00
misc	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00
regression	Changes to wave file.	2022-12-21 08:41:47 -06:00
src	Fixed minor bug in PLIC. reading interrupt source 0 should not return x. it should provide produce 0.	2022-12-21 09:00:09 -06:00
testbench	Attempted to make a cache test.	2022-12-18 17:15:08 -06:00