Ross Thompson a973681a90 Added support for logic memory in the IFU and LSU. This disables the bus interface. Peripherals do not work. Also requires using testbench-harvard.sv. I hope to merge this testbench with the main testbench.sv soon.		2022-01-13 22:21:43 -06:00
..
common	Testbench directory cleanup	2022-01-07 17:02:16 +00:00
fp
sdc	Testbench directory cleanup	2022-01-07 17:02:16 +00:00
testbench-coremark_bare.sv	Merged coremark changes	2022-01-10 05:09:28 +00:00
testbench-f64.sv
testbench-fpga.sv	Reformatted MIT license to 95 characters	2022-01-07 12:58:40 +00:00
testbench-harvard.sv	Added support for logic memory in the IFU and LSU. This disables the bus interface. Peripherals do not work. Also requires using testbench-harvard.sv. I hope to merge this testbench with the main testbench.sv soon.	2022-01-13 22:21:43 -06:00
testbench-linux.sv	Capitalized LSU and IFU, changed MulDiv to MDU	2022-01-07 04:30:00 +00:00
testbench.sv	Partial local dtim in lsu configuration.	2022-01-13 17:50:31 -06:00
tests.vh	Fixed PMA regions, Added passing PMA tests to regression	2022-01-10 22:08:26 +00:00