cvw/wally-pipelined
2021-04-21 16:47:05 -05:00
..
bin
config buildroot: sim is now running! 2021-04-17 14:44:32 -04:00
misc/tlb_toy Various code syntax changes to bring HDL to a synthesizable level 2021-04-13 11:27:12 -05:00
ppa
regression Fixed for the instruction spills. 2021-04-21 16:47:05 -05:00
src Fixed for the instruction spills. 2021-04-21 16:47:05 -05:00
testbench Broken icache. Design is done. Time to debug. 2021-04-20 19:55:49 -05:00
testgen Add tests for scause and ucause 2021-04-15 19:41:25 -04:00
lint-wally Why was the linter messed up? 2021-04-20 22:06:12 -05:00