forked from Github_Repos/cvw
57 lines
2.3 KiB
ArmAsm
57 lines
2.3 KiB
ArmAsm
///////////////////////////////////////////
|
|
//
|
|
// WALLY-unvectored-interrupt
|
|
//
|
|
// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
|
|
//
|
|
// Created 2022-03-11
|
|
//
|
|
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
|
|
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
|
|
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
|
|
// is furnished to do so, subject to the following conditions:
|
|
//
|
|
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
|
|
//
|
|
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
|
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
|
|
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
///////////////////////////////////////////
|
|
|
|
#include "WALLY-TEST-LIB-64.h"
|
|
|
|
INIT_TESTS
|
|
|
|
CAUSE_TRAP_TRIGGERS // initialize code that will cause traps for consistent mtval addresses
|
|
|
|
// test 5.3.1.5 Unvectored interrupt tests
|
|
|
|
TRAP_HANDLER m, VECTORED=0, EXT_SIGNATURE=1 // necessary to handle changing modes
|
|
TRAP_HANDLER s, VECTORED=0, EXT_SIGNATURE=1 // turn off vectored interrupts, while turning on recording of mstatus bits.
|
|
|
|
li x28, 0x2
|
|
csrs sstatus, x28 // set sstatus.SIE bit to 1
|
|
li x28, 0x8
|
|
csrc mstatus, x28 // clear mstatus.MIE bit
|
|
WRITE_READ_CSR mie, 0xFFFF
|
|
WRITE_READ_CSR mideleg, 0xFFFFFFFFFFFFFFFF
|
|
|
|
// cause traps, ensuring that we DONT go through the vectored part of the trap handler
|
|
|
|
GOTO_S_MODE
|
|
|
|
jal cause_s_soft_interrupt // only cause one interrupt since we just want to test the tvec csr
|
|
|
|
GOTO_M_MODE
|
|
|
|
jal cause_s_soft_interrupt // set software interrupt pending without it firing so we can make it fire in U mode
|
|
|
|
GOTO_U_MODE // Should cause software interrupt to fire off.
|
|
|
|
END_TESTS
|
|
|
|
TEST_STACK_AND_DATA
|