cvw/wally-pipelined/src/ifu
2021-03-04 09:23:35 -06:00
..
bpred.sv Converted to using the BTB to predict the instruction class. 2021-03-04 09:23:35 -06:00
BTBPredictor.sv Converted to using the BTB to predict the instruction class. 2021-03-04 09:23:35 -06:00
decompress.sv Reorganized src hierarchically 2021-01-30 11:50:37 -05:00
ifu.sv Converted to using the BTB to predict the instruction class. 2021-03-04 09:23:35 -06:00
RAsPredictor.sv RAS needs to be reset or preloaded. For now I just reset it. 2021-02-19 20:09:07 -06:00
satCounter2.sv We now have a solid rough draft of the 2 bit sat counter branch predictor with BTB and RAS. 2021-02-15 14:51:39 -06:00
SramModel.sv Hacked the sram memory models to reset their internal registers. This allows the simulation to run but is only temporary. 2021-02-18 21:32:15 -06:00
twoBitPredictor.sv Hacked the sram memory models to reset their internal registers. This allows the simulation to run but is only temporary. 2021-02-18 21:32:15 -06:00