| .. |
|
slack-notifier
|
added instructions to slack notifier
|
2022-05-18 16:50:31 -07:00 |
|
wave-dos
|
Added signal to monitor HBURST and comments for each burst in busdp
|
2022-05-26 13:35:49 -07:00 |
|
wkdir
|
added wkdir in regression so regression runs out of box (assuming the old version of arch tests)
|
2022-05-17 20:32:38 +00:00 |
|
buildrootBugFinder.py
|
update to match new filesystem organization
|
2022-03-26 21:28:32 +00:00 |
|
fpga-wave.do
|
Fixed the SDC clock divider so it actually can work during reset. This will enable the fpga to operate at a faster clock while the SDC is < 10Mhz.
|
2022-04-04 09:57:26 -05:00 |
|
lint-wally
|
removed rv64fp from lint
|
2022-06-21 15:48:47 -07:00 |
|
linux-wave.do
|
small signs of life on new interrupt spoofing
|
2022-04-08 12:32:30 -07:00 |
|
make-tests.sh
|
simplified make-tests.sh to run the current makefile in regression
|
2022-05-17 17:29:34 -07:00 |
|
Makefile
|
changed order of makefiles and fixed warnings when running makes
|
2022-06-21 16:10:18 -07:00 |
|
makefile-memfile
|
fixed issue where the unused spike elf files were being used to find objdump files that didn't exist causing makefile-memfile to fail prematurely
|
2022-06-21 15:39:04 -07:00 |
|
regression-wally
|
./regression-wally -buildroot or ./regression-wally -all now builds Linux from instruction 0 instead of trying to reach instruction 246000000
|
2022-06-29 13:40:11 -07:00 |
|
sim-buildroot
|
switch linux-testbench infrastructure over to new linux testvectors at /opt/riscv
|
2022-03-01 03:11:43 +00:00 |
|
sim-buildroot-batch
|
sim-buildroot-batch now runs wally-pipelined-batch
|
2022-07-06 18:06:43 -07:00 |
|
sim-testfloat
|
postprocessing unit created and passing all tests
|
2022-06-13 22:47:51 +00:00 |
|
sim-testfloat-batch
|
modified result select to account for x/inf
|
2022-06-24 21:23:15 +00:00 |
|
sim-wally
|
qslc_r4a2 generator
|
2022-06-09 17:26:47 +00:00 |
|
sim-wally-batch
|
Fixed unpacker bug LT EQ LE pass testfloat
|
2022-05-20 17:19:50 +00:00 |
|
testfloat.do
|
Testfloat running division - not passing
|
2022-06-23 00:07:34 +00:00 |
|
wally-harvard.do
|
Added support for logic memory in the IFU and LSU. This disables the bus interface. Peripherals do not work. Also requires using testbench-harvard.sv. I hope to merge this testbench with the main testbench.sv soon.
|
2022-01-13 22:21:43 -06:00 |
|
wally-pipelined-batch.do
|
sim-buildroot-batch now runs wally-pipelined-batch
|
2022-07-06 18:06:43 -07:00 |
|
wally-pipelined-fpga.do
|
fpga simulation works again.
|
2022-04-03 17:31:07 -05:00 |
|
wally-pipelined.do
|
Added check to halt testbench on failing to find file
|
2022-07-05 02:28:59 +00:00 |
|
wave-all.do
|
Moved all instr/load/storeamo faults to mmu with the exception of instr misaligned fault.
|
2022-01-27 17:11:27 -06:00 |
|
wave-fpu.do
|
radix-4 early termination working for special cases - not working completely
|
2022-06-27 20:43:55 +00:00 |
|
wave.do
|
Merge branch 'main' into cacheburstmode
|
2022-06-09 17:51:03 -07:00 |
