David Harris 9bcddfa5dd Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main		2021-03-01 00:09:55 -05:00
..
dmem	Initial (untested) implementation of lr and sc	2021-03-01 00:09:45 -05:00
ebu	Cleaned out unused signals	2021-02-26 09:17:36 -05:00
fpu	Retimed peripherals for AHB interface	2021-02-26 00:55:41 -05:00
generic	Initial (untested) implementation of lr and sc	2021-03-01 00:09:45 -05:00
hazard	Eliminated flushing pipeline on CSR reads	2021-02-26 17:00:07 -05:00
ieu	Initial (untested) implementation of lr and sc	2021-03-01 00:09:45 -05:00
ifu	Cleaned out unused signals	2021-02-26 09:17:36 -05:00
muldiv	Cleaned out unused signals	2021-02-26 09:17:36 -05:00
privileged	Eliminated flushing pipeline on CSR reads	2021-02-26 17:00:07 -05:00
uncore	Properly implemented the fix from commit 31c07b2adc	2021-02-28 22:22:04 -06:00
wally	Initial (untested) implementation of lr and sc	2021-03-01 00:09:45 -05:00