cvw/wally-pipelined/src
2021-06-08 12:41:25 -04:00
..
cache Continued I-Cache cleanup. 2021-06-04 15:14:05 -05:00
dmem Ah big ole merge! Passes sim-wally-batch and linting, so should be fine 2021-06-08 12:41:25 -04:00
ebu Ah big ole merge! Passes sim-wally-batch and linting, so should be fine 2021-06-08 12:41:25 -04:00
fpu lint is clean 2021-06-07 14:22:54 -04:00
generic fixed lint warnings for fpu and lzd 2021-06-05 12:06:33 -04:00
hazard lint is clean 2021-06-07 14:22:54 -04:00
ieu fixed InstrValid signals and implemented less costly MEPC loading 2021-06-02 10:03:19 -04:00
ifu Cleaned up some unused signals 2021-06-04 21:04:19 -04:00
mmu remove redundant decodes, fixed mmu logic ins/outs 2021-06-07 19:23:30 -04:00
muldiv lint is clean 2021-06-07 14:22:54 -04:00
privileged Ah big ole merge! Passes sim-wally-batch and linting, so should be fine 2021-06-08 12:41:25 -04:00
uncore * GPIO comprehensive testing 2021-06-08 12:32:46 -04:00
wally Ah big ole merge! Passes sim-wally-batch and linting, so should be fine 2021-06-08 12:41:25 -04:00