bbracker 3be73695e3 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main		2021-07-09 18:56:28 -04:00
..
bin	Icache integrated!	2021-04-26 11:48:58 -05:00
config	Updated MISA defining as well as porting sizes for peripherals (34 to 56)	2021-07-07 02:37:09 -04:00
linux-testgen	fix_mem.py bugfix	2021-07-09 18:56:17 -04:00
misc	Clean up MMU code	2021-05-14 07:12:32 -04:00
ppa	Config file for ppa experiments	2021-03-25 10:23:21 -05:00
regression	Fixed bug in the LSU pagetable walker interlock.	2021-07-06 10:41:36 -05:00
src	Simplified tlbmixer mux to and-or	2021-07-08 23:34:24 -04:00
testbench	more completely uncomment MMU tests to make sim wally work	2021-07-06 14:33:52 -04:00
testgen	mcause test fixes and s-mode interrupt bugfix	2021-06-16 17:37:08 -04:00
lint-wally	Merge difficulties	2021-06-07 09:50:23 -04:00