Ross Thompson 3582be4dbb Fixed issue with desync of PCW and ExpectedPCW in linux test bench. The ERROR macro had a 10 ns delay which caused the trace to skip 1 instruction.		2021-08-05 16:49:03 -05:00
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bin	Icache integrated!	2021-04-26 11:48:58 -05:00
config	fpu cleanup	2021-07-24 14:59:57 -04:00
fpu-testfloat/FMA/tbgen	all fpu units use the unpacking unit	2021-07-28 23:49:21 -04:00
linux-testgen	Fixed issue with desync of PCW and ExpectedPCW in linux test bench. The ERROR macro had a 10 ns delay which caused the trace to skip 1 instruction.	2021-08-05 16:49:03 -05:00
misc	Clean up MMU code	2021-05-14 07:12:32 -04:00
ppa	Config file for ppa experiments	2021-03-25 10:23:21 -05:00
regression	Patched up changes for wally-pipelined.do and wally-buildroot.do to support moved common testbench files.	2021-07-30 14:24:50 -05:00
src	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2021-07-30 17:57:13 -05:00
testbench	Fixed issue with desync of PCW and ExpectedPCW in linux test bench. The ERROR macro had a 10 ns delay which caused the trace to skip 1 instruction.	2021-08-05 16:49:03 -05:00
testgen	mcause test fixes and s-mode interrupt bugfix	2021-06-16 17:37:08 -04:00
lint-wally	Merge difficulties	2021-06-07 09:50:23 -04:00