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2d662bc4be
cvw
/
fpga
/
constraints
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Ross Thompson
68745d40f2
Modified FPGA to add additional signals to ILA. Created advanced trigger for ILA using vivado's tsm language.
2021-12-12 17:21:44 -06:00
..
constraints.xdc
Fixed more constraint issues in fpga.
2021-12-05 15:14:18 -06:00
debug2.xdc
Modified FPGA to add additional signals to ILA. Created advanced trigger for ILA using vivado's tsm language.
2021-12-12 17:21:44 -06:00
debug.xdc
Fixed more constraint issues in fpga.
2021-12-05 15:14:18 -06:00
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