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23e78c4842
cvw
/
wally-pipelined
/
config
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Ross Thompson
23e78c4842
Fixed uart by reversing the bit order on transmit.
...
Set prescale to 0.
2021-11-17 10:32:41 -06:00
..
buildroot
busybear
coremark
coremark_bare
fpga
Fixed uart by reversing the bit order on transmit.
2021-11-17 10:32:41 -06:00
old
rv32g
rv32ic
rv64BP
rv64g
rv64ic
shared
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