18 Commits

Author	SHA1	Message	Date
Thomas Fleming	e780694ee0	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main ... Conflicts: wally-pipelined/src/mmu/priority_encoder.sv	2021-04-15 16:20:43 -04:00
Thomas Fleming	6dd7591ceb	Change priority encoder to avoid extra assignment	2021-04-15 16:17:35 -04:00
Teo Ene	ad86295fcf	Temporary change to mmu/priority_encoder.sv ... Necessary to get synth working Original HDL is still there, just commented out	2021-04-15 13:37:12 -05:00
Thomas Fleming	7d2d6823f1	Fix mmu lint errors	2021-04-13 19:19:58 -04:00
Thomas Fleming	09c9c49541	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main ... Conflicts: wally-pipelined/src/ebu/pagetablewalker.sv	2021-04-13 13:42:03 -04:00
Thomas Fleming	dc8a165806	Add lru algorithm to TLB	2021-04-13 13:37:24 -04:00
Teo Ene	1018a10625	Various code syntax changes to bring HDL to a synthesizable level	2021-04-13 11:27:12 -05:00
Thomas Fleming	fc39535e4e	Refactor TLB into multiple files	2021-04-08 03:24:10 -04:00
Thomas Fleming	c54aecde73	Provide attribution link for priority encoder	2021-04-08 03:05:06 -04:00
Thomas Fleming	303c2c4839	Implement support for superpages	2021-04-08 02:44:59 -04:00
Thomas Fleming	1cbdaf1f05	Fix extraneous page fault stall	2021-04-03 21:28:24 -04:00
Thomas Fleming	fdb20ee1cf	Implement sfence.vma and fix tlb writing	2021-04-01 15:55:05 -04:00
Thomas Fleming	77b8e27205	Disable 'always-on' virtual memory	2021-03-30 22:49:47 -04:00
Thomas Fleming	7126ab7864	Complete basic page table walker	2021-03-30 22:19:27 -04:00
Thomas Fleming	7f7597e667	Connect tlb, pagetablewalker, and memory	2021-03-18 14:35:46 -04:00
Thomas Fleming	8c97143be6	Place tlb parameters into constant header file	2021-03-05 13:35:24 -05:00
Thomas Fleming	1df7151fb6	Install tlb into ifu	2021-03-04 03:11:34 -05:00
Thomas Fleming	5f98c932bf	Move tlb into mmu directory	2021-03-04 02:39:08 -05:00