Ross Thompson
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cd0da2e3b3
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Updated the names of the *WriteDataM inside the LSU to more meaningful names.
Moved the FWriteDataMux so that the bus and dtim both get fpu stores.
Modified the PMA to disallow double sized reads when XLEN=32.
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2022-08-23 10:34:39 -05:00 |
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Ross Thompson
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96d6218078
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Possible reduction of ignorerequest.
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2022-08-19 18:07:44 -05:00 |
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Ross Thompson
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fe896bff8e
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Found a way to remove a bus input into MMU. PAdr can be made into VAdr by selecting the faulting virtual address when writing the DTLB.
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2022-03-24 23:47:28 -05:00 |
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Ross Thompson
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95bb4cc8a8
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Minor cleanup to interlockfsm.
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2022-03-08 23:38:58 -06:00 |
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David Harris
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2cea3349ad
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LSU/Cache code review notes
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2022-03-04 00:07:31 +00:00 |
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Ross Thompson
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971dd494f6
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Clarified interlockfsm.
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2022-02-22 11:31:28 -06:00 |
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Ross Thompson
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1ab2e7590b
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Added some clearity to lsuvirtmem.sv.
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2022-02-21 17:20:58 -06:00 |
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Ross Thompson
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ace743ae91
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Changed HPTWRead/HPTWWrite to be HPTWRW to be similar to MemRW.
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2022-02-21 16:54:38 -06:00 |
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Ross Thompson
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414e73edd9
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Cleaned up names in lsuvirtmem.
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2022-02-21 16:44:30 -06:00 |
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Ross Thompson
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456a54166a
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Minor cleanup of lsu.
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2022-02-21 12:46:06 -06:00 |
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Ross Thompson
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5d9ad011d2
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Moved mux into lsuvirtmem.
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2022-02-21 09:31:29 -06:00 |
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Ross Thompson
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a60332b455
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Minor changes to LSU.
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2022-02-19 14:38:17 -06:00 |
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Ross Thompson
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0bd533473c
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New config option to enable hptw writes to PTE in memory to update Access and Dirty bits.
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2022-02-17 17:19:41 -06:00 |
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Ross Thompson
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d152733a17
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Rough implementation passing regression test with hptw atomic writes to memory.
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2022-02-17 14:46:11 -06:00 |
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Ross Thompson
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4cfb601dc8
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Fixed a bunch of the virtual memory changes. Now supports atomic update of PTE in memory concurrent with TLB.
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2022-02-17 10:04:18 -06:00 |
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Ross Thompson
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565ca4e4a3
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Broken state. address translation not working after changes to hptw to support atomic updates to PT.
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2022-02-16 23:37:36 -06:00 |
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Ross Thompson
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36ab78ef3b
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Removed all possilbe paths to PreSelAdr from TrapM.
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2022-02-09 19:20:10 -06:00 |
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David Harris
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02071700d6
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Removed Busybear dependencies
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2022-02-02 20:28:21 +00:00 |
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Ross Thompson
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31da37dd0f
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Moved lsu virtual memory logic into separate module.
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2022-01-31 11:56:03 -06:00 |
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