Kip Macsai-Goren
|
a95a7a7b82
|
working version with new mmu comments, old boottim values
|
2021-06-08 15:20:25 -04:00 |
|
David Harris
|
b613f46c2d
|
Resized BOOT TIM to 1 KB
|
2021-06-08 14:04:32 -04:00 |
|
David Harris
|
2ae5ca19b5
|
Continued merge
|
2021-06-07 12:49:47 -04:00 |
|
David Harris
|
ff62000e2c
|
Second attept to commit refactoring config files
|
2021-06-07 12:37:46 -04:00 |
|
David Harris
|
dc0b19dfaa
|
Merge difficulties
|
2021-06-07 09:50:23 -04:00 |
|
David Harris
|
d5ec797ba4
|
Refactored configuration files and renamed testbench-busybear to testbench-linux
|
2021-06-07 09:46:52 -04:00 |
|
Kip Macsai-Goren
|
22e8e06ac7
|
moved privilege dfinitions into wally-constants, upgraded relevant includes
|
2021-06-04 17:55:07 -04:00 |
|
David Harris
|
a26bf37be8
|
Started MMU
|
2021-06-04 11:59:14 -04:00 |
|
Ross Thompson
|
72363f5c66
|
Added the ability to exclude branch predictor.
|
2021-04-26 14:27:42 -05:00 |
|
Ross Thompson
|
6e803b724e
|
Merge branch 'tests' into icache-almost-working
|
2021-04-25 21:25:36 -05:00 |
|
Noah Boorstin
|
6954e6df4c
|
buildroot: sim is now running!
yes it only gets through 5 instructions right now. Yes that's my fault.
|
2021-04-17 14:44:32 -04:00 |
|
bbracker
|
31c6b2d01f
|
Yee hoo first draft of PLIC plus self-checking tests
|
2021-04-04 06:40:53 -04:00 |
|
Ross Thompson
|
e1842c8da6
|
Broken commit. Trying to get exe2memfile.pl to work correctly with non 0x8000_0000 starting addresses.
|
2021-03-23 13:54:59 -05:00 |
|
bbracker
|
11d4a8ab34
|
first pass at PLIC interface
|
2021-03-22 10:14:21 -04:00 |
|
Shreya Sanghai
|
bbe0957df5
|
Merge branch 'gshare' into main
Conflicts:
wally-pipelined/regression/wave.do
|
2021-03-18 17:25:48 -04:00 |
|
Ross Thompson
|
1091dd10c1
|
Switched to gshare from global history.
Fixed a few minor bugs.
|
2021-03-18 16:05:59 -05:00 |
|
Noah Boorstin
|
bc1a0c6ee7
|
change ifndef to generate/if
|
2021-03-18 12:50:19 -04:00 |
|
Noah Boorstin
|
a2b0af460e
|
everyone gets a bootram
|
2021-03-18 12:35:37 -04:00 |
|
Elizabeth Hedenberg
|
da758e9e14
|
Merge branch '3_3_2021' into main
Making sure coremark works with spring break changes
|
2021-03-17 14:11:37 -04:00 |
|
Shreya Sanghai
|
36f0631203
|
added gshare and global history predictor
|
2021-03-16 17:03:01 -04:00 |
|
Shreya Sanghai
|
9eed875886
|
added global history branch predictor
|
2021-03-16 16:06:40 -04:00 |
|
Shreya Sanghai
|
74f1641c5a
|
Merge branch 'counters' into main
added a configurable number of performance counters
|
2021-03-16 11:01:30 -04:00 |
|
Ross Thompson
|
4c8952de6a
|
Converted branch predictor preloads to use system verilog rather than modelsim's load command.
|
2021-03-15 12:39:44 -05:00 |
|
Shreya Sanghai
|
f0ec365117
|
added performance counters
|
2021-03-04 11:42:52 -05:00 |
|
Teo Ene
|
6ebb79abe0
|
Linux CoreMark is operational
|
2021-03-04 05:58:18 -06:00 |
|
Teo Ene
|
08a7f6ec25
|
In the process of updating coremark.RV64I program to work with Dr. Harris's perl script. Commiting to make it easier to switch branches
|
2021-03-04 01:27:05 -06:00 |
|
Teo Ene
|
61b872a3e8
|
Changed TIMBASE in coremark config file
|
2021-02-25 11:03:41 -06:00 |
|
Teo Ene
|
3e5de35fc4
|
Added provisional coremark files from work with Elizabeth
|
2021-02-24 20:07:07 -06:00 |
|