17 Commits

Author	SHA1	Message	Date
Katherine Parry	aedd71d570	move some FPU select muxs to execute stage	2021-08-13 14:41:22 -04:00
Katherine Parry	e00f181bcf	LZA added to FMA and attemting a merged FMA and adder in synthesis	2021-08-10 13:57:16 -04:00
Katherine Parry	d60e394ef9	all fpu units use the unpacking unit	2021-07-28 23:49:21 -04:00
Katherine Parry	ef28679721	fpu cleanup	2021-07-24 14:59:57 -04:00
David Harris	c9890afb7f	Move Z sign swapping out of unpacker	2021-07-22 14:32:38 -04:00
David Harris	31be570461	Move Z=0 mux out of unpacker.	2021-07-22 14:28:55 -04:00
David Harris	21a65f45cd	Partial work on Unpacking exponents to larger word size. FCVT and FMA are presently broken.	2021-07-22 14:18:27 -04:00
David Harris	19dac66264	Simplify unpacker	2021-07-22 13:40:42 -04:00
David Harris	44141047ef	Removed Assumed1 from FPU interface	2021-07-22 13:04:47 -04:00
David Harris	5e155e4fd1	Simplified interface to fclassify and fsgn	2021-07-22 12:30:46 -04:00
Katherine Parry	b9081e514c	FMA parameterized	2021-07-20 22:04:21 -04:00
David Harris	46ab609498	Updated FMA1 with parameterized size	2021-07-18 20:40:49 -04:00
David Harris	ed64d37e65	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2021-07-18 17:36:29 -04:00
David Harris	4f8f52f283	Added FLEN, NE, NF to config and started using these in FMA1	2021-07-18 17:28:25 -04:00
Katherine Parry	60dabb9094	fdivsqrt inegrated, but not completley working	2021-07-18 14:03:37 -04:00
Katherine Parry	f5bfdf46db	fpu unpacking unit created	2021-07-14 17:56:49 -04:00
Katherine Parry	36f59f3c99	Almost all convert instructions pass Imperas tests	2021-07-11 18:06:33 -04:00