forked from Github_Repos/cvw
516 lines
26 KiB
Systemverilog
516 lines
26 KiB
Systemverilog
///////////////////////////////////////////
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//
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// Written: Katherine Parry, David Harris
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// Modified: 6/23/2021
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//
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// Purpose: Floating point multiply-accumulate of configurable size
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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`include "wally-config.vh"
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// `include "../../../config/rv64icfd/wally-config.vh"
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module fma(
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input logic clk,
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input logic reset,
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input logic FlushM,
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input logic StallM,
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input logic FmtE, FmtM, // precision 1 = double 0 = single
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input logic [2:0] FOpCtrlM, FOpCtrlE, // 000 = fmadd (X*Y)+Z, 001 = fmsub (X*Y)-Z, 010 = fnmsub -(X*Y)+Z, 011 = fnmadd -(X*Y)-Z, 100 = fmul (X*Y)
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input logic [2:0] FrmM, // rounding mode 000 = rount to nearest, ties to even 001 = round twords zero 010 = round down 011 = round up 100 = round to nearest, ties to max magnitude
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input logic XSgnE, YSgnE, ZSgnE,
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input logic [`NE-1:0] XExpE, YExpE, ZExpE,
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input logic [`NF:0] XManE, YManE, ZManE,
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input logic XSgnM, YSgnM, ZSgnM,
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input logic [`NE-1:0] XExpM, YExpM, ZExpM, // ***needed
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input logic [`NF:0] XManM, YManM, ZManM,
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input logic XDenormE, YDenormE, ZDenormE,
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input logic XZeroE, YZeroE, ZZeroE,
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input logic XNaNM, YNaNM, ZNaNM,
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input logic XSNaNM, YSNaNM, ZSNaNM,
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input logic XZeroM, YZeroM, ZZeroM,
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input logic XInfM, YInfM, ZInfM,
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input logic [10:0] BiasE,
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output logic [`FLEN-1:0] FMAResM,
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output logic [4:0] FMAFlgM);
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logic [2*`NF+1:0] ProdManE, ProdManM;
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logic [3*`NF+5:0] AlignedAddendE, AlignedAddendM;
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logic [`NE+1:0] ProdExpE, ProdExpM;
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logic AddendStickyE, AddendStickyM;
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logic KillProdE, KillProdM;
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fma1 fma1 (.XExpE, .YExpE, .ZExpE, .XManE, .YManE, .ZManE,
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.BiasE, .XDenormE, .YDenormE, .ZDenormE, .XZeroE, .YZeroE, .ZZeroE,
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.FOpCtrlE, .FmtE, .ProdManE, .AlignedAddendE,
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.ProdExpE, .AddendStickyE, .KillProdE);
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flopenrc #(106) EMRegFma1(clk, reset, FlushM, ~StallM, ProdManE, ProdManM);
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flopenrc #(162) EMRegFma2(clk, reset, FlushM, ~StallM, AlignedAddendE, AlignedAddendM);
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flopenrc #(13) EMRegFma3(clk, reset, FlushM, ~StallM, ProdExpE, ProdExpM);
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flopenrc #(2) EMRegFma4(clk, reset, FlushM, ~StallM,
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{AddendStickyE, KillProdE},
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{AddendStickyM, KillProdM});
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fma2 fma2(.XSgnM, .YSgnM, .ZSgnM, .XExpM, .YExpM, .ZExpM, .XManM, .YManM, .ZManM,
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.FOpCtrlM, .FrmM, .FmtM,
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.ProdManM, .AlignedAddendM, .ProdExpM, .AddendStickyM, .KillProdM,
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.XZeroM, .YZeroM, .ZZeroM, .XInfM, .YInfM, .ZInfM, .XNaNM, .YNaNM, .ZNaNM, .XSNaNM, .YSNaNM, .ZSNaNM,
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.FMAResM, .FMAFlgM);
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endmodule
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module fma1(
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// input logic XSgnE, YSgnE, ZSgnE,
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input logic [`NE-1:0] XExpE, YExpE, ZExpE, // biased exponents in B(NE.0) format
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input logic [`NF:0] XManE, YManE, ZManE, // fractions in U(0.NF) format]
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input logic XDenormE, YDenormE, ZDenormE,
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input logic XZeroE, YZeroE, ZZeroE,
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input logic [`NE-1:0] BiasE,
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input logic [2:0] FOpCtrlE, // 000 = fmadd (X*Y)+Z, 001 = fmsub (X*Y)-Z, 010 = fnmsub -(X*Y)+Z, 011 = fnmadd -(X*Y)-Z, 100 = fmul (X*Y)
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input logic FmtE, // precision 1 = double 0 = single
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output logic [2*`NF+1:0] ProdManE, // 1.X frac * 1.Y frac in U(2.2Nf) format
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output logic [3*`NF+5:0] AlignedAddendE, // Z aligned for addition in U(NF+5.2NF+1)
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output logic [`NE+1:0] ProdExpE, // X exponent + Y exponent - bias in B(NE+2.0) format; adds 2 bits to allow for size of number and negative sign
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output logic AddendStickyE, // sticky bit that is calculated during alignment
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output logic KillProdE // set the product to zero before addition if the product is too small to matter
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);
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logic [`NE+1:0] AlignCnt; // how far to shift the addend to align with the product in Q(NE+2.0) format *** is this enough bits?
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logic [4*`NF+5:0] ZManShifted; // output of the alignment shifter including sticky bits U(NF+5.3NF+1)
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logic [4*`NF+5:0] ZManPreShifted; // input to the alignment shifter U(NF+5.3NF+1)
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///////////////////////////////////////////////////////////////////////////////
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// Calculate the product
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// - When multipliying two fp numbers, add the exponents
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// - Subtract the bias (XExp + YExp has two biases, one from each exponent)
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// - Denormal numbers have an an exponent value of 1, however they are
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// represented with an exponent of 0. add one if there is a denormal number
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///////////////////////////////////////////////////////////////////////////////
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// verilator lint_off WIDTH
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assign ProdExpE = (XZeroE|YZeroE) ? 0 :
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XExpE + YExpE - BiasE + XDenormE + YDenormE;
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// verilator lint_on WIDTH
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// Calculate the product's mantissa
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// - Mantissa includes the assumed one. If the number is denormalized or zero, it does not have an assumed one.
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assign ProdManE = XManE * YManE;
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///////////////////////////////////////////////////////////////////////////////
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// Alignment shifter
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///////////////////////////////////////////////////////////////////////////////
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// determine the shift count for alignment
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// - negitive means Z is larger, so shift Z left
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// - positive means the product is larger, so shift Z right
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// - Denormal numbers have an an exponent value of 1, however they are
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// represented with an exponent of 0. add one to the exponent if it is a denormal number
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assign AlignCnt = ProdExpE - ZExpE - ZDenormE;
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// Defualt Addition without shifting
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// | 54'b0 | 106'b(product) | 2'b0 |
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// |1'b0| addnend |
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// the 1'b0 before the added is because the product's mantissa has two bits before the binary point (xx.xxxxxxxxxx...)
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assign ZManPreShifted = {(`NF+3)'(0), ZManE, /*106*/(2*`NF+2)'(0)};
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always_comb
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begin
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// If the product is too small to effect the sum, kill the product
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// | 54'b0 | 106'b(product) | 2'b0 |
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// | addnend |
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if ($signed(AlignCnt) <= $signed(-(`NF+4))) begin
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KillProdE = 1;
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ZManShifted = ZManPreShifted;//{107'b0, XManE, 54'b0};
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AddendStickyE = ~(XZeroE|YZeroE);
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// If the Addend is shifted left (negitive AlignCnt)
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// | 54'b0 | 106'b(product) | 2'b0 |
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// | addnend |
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end else if($signed(AlignCnt) <= $signed(0)) begin
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KillProdE = 0;
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ZManShifted = ZManPreShifted << -AlignCnt;
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AddendStickyE = |(ZManShifted[`NF-1:0]);
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// If the Addend is shifted right (positive AlignCnt)
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// | 54'b0 | 106'b(product) | 2'b0 |
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// | addnend |
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end else if ($signed(AlignCnt)<=$signed(2*`NF+1)) begin
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KillProdE = 0;
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ZManShifted = ZManPreShifted >> AlignCnt;
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AddendStickyE = |(ZManShifted[`NF-1:0]);
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// If the addend is too small to effect the addition
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// - The addend has to shift two past the end of the addend to be considered too small
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// - The 2 extra bits are needed for rounding
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// | 54'b0 | 106'b(product) | 2'b0 |
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// | addnend |
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end else begin
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KillProdE = 0;
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ZManShifted = 0;
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AddendStickyE = ~ZZeroE;
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end
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end
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assign AlignedAddendE = ZManShifted[4*`NF+5:`NF];
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endmodule
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module fma2(
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input logic XSgnM, YSgnM, ZSgnM,
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input logic [`NE-1:0] XExpM, YExpM, ZExpM,
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input logic [`NF-1:0] XManM, YManM, ZManM,
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input logic [2:0] FrmM, // rounding mode 000 = rount to nearest, ties to even 001 = round twords zero 010 = round down 011 = round up 100 = round to nearest, ties to max magnitude
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input logic [2:0] FOpCtrlM, // 000 = fmadd (X*Y)+Z, 001 = fmsub (X*Y)-Z, 010 = fnmsub -(X*Y)+Z, 011 = fnmadd -(X*Y)-Z, 100 = fmul (X*Y)
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input logic FmtM, // precision 1 = double 0 = single
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input logic [2*`NF+1:0] ProdManM, // 1.X frac * 1.Y frac
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input logic [3*`NF+5:0] AlignedAddendM, // Z aligned for addition
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input logic [`NE+1:0] ProdExpM, // X exponent + Y exponent - bias
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input logic AddendStickyM, // sticky bit that is calculated during alignment
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input logic KillProdM, // set the product to zero before addition if the product is too small to matter
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input logic XZeroM, YZeroM, ZZeroM, // inputs are zero
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input logic XInfM, YInfM, ZInfM, // inputs are infinity
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input logic XNaNM, YNaNM, ZNaNM, // inputs are NaN
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input logic XSNaNM, YSNaNM, ZSNaNM, // inputs are signaling NaNs
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output logic [`FLEN-1:0] FMAResM, // FMA final result
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output logic [4:0] FMAFlgM); // FMA flags {invalid, divide by zero, overflow, underflow, inexact}
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logic [`NF-1:0] ResultFrac; // Result fraction
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logic [`NE-1:0] ResultExp; // Result exponent
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logic ResultSgn; // Result sign
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logic PSgn; // product sign
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logic [2*`NF+1:0] ProdMan2; // product being added
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logic [3*`NF+6:0] AlignedAddend2; // possibly inverted aligned Z
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logic [3*`NF+5:0] Sum; // positive sum
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logic [3*`NF+6:0] PreSum; // possibly negitive sum
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logic [`NE+1:0] SumExp; // exponent of the normalized sum
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logic [`NE+1:0] SumExpTmp; // exponent of the normalized sum not taking into account denormal or zero results
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logic [`NE+1:0] SumExpTmpMinus1; // SumExpTmp-1
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logic [`NE+1:0] FullResultExp; // ResultExp with bits to determine sign and overflow
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logic [`NF+2:0] NormSum; // normalized sum
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logic [3*`NF+5:0] SumShifted; // sum shifted for normalization
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logic [8:0] NormCnt; // output of the leading zero detector //***change this later
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logic NormSumSticky; // sticky bit calulated from the normalized sum
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logic SumZero; // is the sum zero
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logic NegSum; // is the sum negitive
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logic InvZ; // invert Z if there is a subtraction (-product + Z or product - Z)
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logic ResultDenorm; // is the result denormalized
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logic Sticky; // Sticky bit
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logic Plus1, Minus1, CalcPlus1, CalcMinus1; // do you add or subtract one for rounding
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logic UfPlus1, UfCalcPlus1; // do you add one (for determining underflow flag)
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logic Invalid,Underflow,Overflow,Inexact; // flags
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logic [8:0] DenormShift; // right shift if the result is denormalized //***change this later
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logic SubBySmallNum; // was there supposed to be a subtraction by a small number
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logic [`FLEN-1:0] Addend; // value to add (Z or zero)
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logic ZeroSgn; // the result's sign if the sum is zero
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logic ResultSgnTmp; // the result's sign assuming the result is not zero
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logic Guard, Round, LSBNormSum; // bits needed to determine rounding
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logic UfGuard, UfRound, UfLSBNormSum; // bits needed to determine rounding for underflow flag
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logic [`NE+1:0] MaxExp; // maximum value of the exponent
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logic [`NE+1:0] FracLen; // length of the fraction
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logic SigNaN; // is an input a signaling NaN
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logic UnderflowFlag; // Underflow singal used in FMAFlgM (used to avoid a circular depencency)
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logic [`FLEN-1:0] XNaNResult, YNaNResult, ZNaNResult, InvalidResult, OverflowResult, KillProdResult, UnderflowResult; // possible results
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// Calculate the product's sign
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// Negate product's sign if FNMADD or FNMSUB
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assign PSgn = XSgnM ^ YSgnM ^ FOpCtrlM[1];
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///////////////////////////////////////////////////////////////////////////////
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// Addition
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///////////////////////////////////////////////////////////////////////////////
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// Negate Z when doing one of the following opperations:
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// -prod + Z
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// prod - Z
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assign InvZ = ZSgnM ^ PSgn;
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// Choose an inverted or non-inverted addend - the one is added later
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assign AlignedAddend2 = InvZ ? ~{1'b0, AlignedAddendM} : {1'b0, AlignedAddendM};
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// Kill the product if the product is too small to effect the addition (determined in fma1.sv)
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assign ProdMan2 = KillProdM ? 0 : ProdManM;
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// Do the addition
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// - add one to negate if the added was inverted
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// - the 2 extra bits at the begining and end are needed for rounding
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assign PreSum = AlignedAddend2 + {ProdMan2, 2'b0} + InvZ;
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// Is the sum negitive
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assign NegSum = PreSum[3*`NF+6];
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// If the sum is negitive, negate the sum.
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assign Sum = NegSum ? -PreSum[3*`NF+5:0] : PreSum[3*`NF+5:0];
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///////////////////////////////////////////////////////////////////////////////
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// Leading one detector
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///////////////////////////////////////////////////////////////////////////////
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//*** replace with non-behavoral code
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logic [8:0] i;
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always_comb begin
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i = 0;
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while (~Sum[3*`NF+5-i] && $unsigned(i) <= $unsigned(3*`NF+5)) i = i+1; // search for leading one
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NormCnt = i+1; // compute shift count
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end
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///////////////////////////////////////////////////////////////////////////////
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// Normalization
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///////////////////////////////////////////////////////////////////////////////
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// Determine if the sum is zero
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assign SumZero = ~(|Sum);
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// determine the length of the fraction based on precision
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assign FracLen = FmtM ? `NF : 13'd23;
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// Determine if the result is denormal
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assign SumExpTmp = KillProdM ? {2'b0, ZExpM} : ProdExpM + -({4'b0, NormCnt} - (`NF+4));
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assign ResultDenorm = $signed(SumExpTmp)<=0 & ($signed(SumExpTmp)>=$signed(-FracLen)) & ~SumZero;
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// Determine the shift needed for denormal results
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assign SumExpTmpMinus1 = SumExpTmp-1;
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assign DenormShift = ResultDenorm ? SumExpTmpMinus1[8:0] : 0; //*** change this when changing the size of DenormShift also change to an and opperation
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// Normalize the sum
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assign SumShifted = SumZero ? 0 : Sum << NormCnt+DenormShift; //*** fix mux's with constants in them
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assign NormSum = SumShifted[3*`NF+5:2*`NF+3];
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// Calculate the sticky bit
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assign NormSumSticky = FmtM ? (|SumShifted[2*`NF+3:0]) : (|SumShifted[136:0]);
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assign Sticky = AddendStickyM | NormSumSticky;
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// Determine sum's exponent
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assign SumExp = SumZero ? 0 : //***again fix mux
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ResultDenorm ? 0 :
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SumExpTmp;
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///////////////////////////////////////////////////////////////////////////////
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// Rounding
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///////////////////////////////////////////////////////////////////////////////
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// round to nearest even
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// {Guard, Round, Sticky}
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// 0xx - do nothing
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// 100 - tie - Plus1 if result is odd (LSBNormSum = 1)
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// - don't add 1 if a small number was supposed to be subtracted
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// 101 - do nothing if a small number was supposed to subtracted (the sticky bit was set by the small number)
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// 110/111 - Plus1
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// round to zero - subtract 1 if a small number was supposed to be subtracted from a positive result with guard and round bits of 0
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// round to -infinity
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// - Plus1 if negative unless a small number was supposed to be subtracted from a result with guard and round bits of 0
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// - subtract 1 if a small number was supposed to be subtracted from a positive result with guard and round bits of 0
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// round to infinity
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// - Plus1 if positive unless a small number was supposed to be subtracted from a result with guard and round bits of 0
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// - subtract 1 if a small number was supposed to be subtracted from a negative result with guard and round bits of 0
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// round to nearest max magnitude
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// {Guard, Round, Sticky}
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// 0xx - do nothing
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// 100 - tie - Plus1
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// - don't add 1 if a small number was supposed to be subtracted
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// 101 - do nothing if a small number was supposed to subtracted (the sticky bit was set by the small number)
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// 110/111 - Plus1
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// determine guard, round, and least significant bit of the result
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assign Guard = FmtM ? NormSum[2] : NormSum[31];
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assign Round = FmtM ? NormSum[1] : NormSum[30];
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assign LSBNormSum = FmtM ? NormSum[3] : NormSum[32];
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// used to determine underflow flag
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assign UfGuard = FmtM ? NormSum[1] : NormSum[30];
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assign UfRound = FmtM ? NormSum[0] : NormSum[29];
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assign UfLSBNormSum = FmtM ? NormSum[2] : NormSum[31];
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// Deterimine if a small number was supposed to be subtrated
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assign SubBySmallNum = AddendStickyM & InvZ & ~(NormSumSticky) & ~ZZeroM;
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always_comb begin
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// Determine if you add 1
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case (FrmM)
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3'b000: CalcPlus1 = Guard & (Round | ((Sticky|UfGuard)&~(~Round&SubBySmallNum)) | (~Round&~(Sticky|UfGuard)&LSBNormSum&~SubBySmallNum));//round to nearest even
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3'b001: CalcPlus1 = 0;//round to zero
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3'b010: CalcPlus1 = ResultSgn & ~(SubBySmallNum & ~Guard & ~Round);//round down
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3'b011: CalcPlus1 = ~ResultSgn & ~(SubBySmallNum & ~Guard & ~Round);//round up
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3'b100: CalcPlus1 = (Guard & (Round | ((Sticky|UfGuard)&~(~Round&SubBySmallNum)) | (~Round&~(Sticky|UfGuard)&~SubBySmallNum)));//round to nearest max magnitude
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default: CalcPlus1 = 1'bx;
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endcase
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// Determine if you add 1 (for underflow flag)
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case (FrmM)
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3'b000: UfCalcPlus1 = UfGuard & (UfRound | (Sticky&~(~UfRound&SubBySmallNum)) | (~UfRound&~Sticky&UfLSBNormSum&~SubBySmallNum));//round to nearest even
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3'b001: UfCalcPlus1 = 0;//round to zero
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3'b010: UfCalcPlus1 = ResultSgn & ~(SubBySmallNum & ~UfGuard & ~UfRound);//round down
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3'b011: UfCalcPlus1 = ~ResultSgn & ~(SubBySmallNum & ~UfGuard & ~UfRound);//round up
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3'b100: UfCalcPlus1 = (UfGuard & (UfRound | (Sticky&~(~UfRound&SubBySmallNum)) | (~UfRound&~Sticky&~SubBySmallNum)));//round to nearest max magnitude
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default: UfCalcPlus1 = 1'bx;
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endcase
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// Determine if you subtract 1
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case (FrmM)
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3'b000: CalcMinus1 = 0;//round to nearest even
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3'b001: CalcMinus1 = SubBySmallNum & ~Guard & ~Round;//round to zero
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3'b010: CalcMinus1 = ~ResultSgn & ~Guard & ~Round & SubBySmallNum;//round down
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3'b011: CalcMinus1 = ResultSgn & ~Guard & ~Round & SubBySmallNum;//round up
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3'b100: CalcMinus1 = 0;//round to nearest max magnitude
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default: CalcMinus1 = 1'bx;
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endcase
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end
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// If an answer is exact don't round
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assign Plus1 = CalcPlus1 & (Sticky | UfGuard | Guard | Round);
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assign UfPlus1 = UfCalcPlus1 & (Sticky | UfGuard | UfRound);
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assign Minus1 = CalcMinus1 & (Sticky | UfGuard | Guard | Round);
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// Compute rounded result
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logic [`FLEN:0] RoundAdd; //*** move this up
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logic [`NF-1:0] NormSumTruncated;
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assign RoundAdd = FmtM ? Minus1 ? {`FLEN+1{1'b1}} : {{{`FLEN{1'b0}}}, Plus1} :
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Minus1 ? {{36{1'b1}}, 29'b0} : {35'b0, Plus1, 29'b0};
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assign NormSumTruncated = FmtM ? NormSum[`NF+2:3] : {NormSum[54:32], 29'b0};
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assign {FullResultExp, ResultFrac} = {SumExp, NormSumTruncated} + RoundAdd;
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assign ResultExp = FullResultExp[`NE-1:0];
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///////////////////////////////////////////////////////////////////////////////
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// Sign calculation
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///////////////////////////////////////////////////////////////////////////////
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// Determine the sign if the sum is zero
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// if cancelation then 0 unless round to -infinity
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// otherwise psign
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assign ZeroSgn = (PSgn^ZSgnM)&~Underflow ? FrmM == 3'b010 : PSgn;
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// is the result negitive
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// if p - z is the Sum negitive
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// if -p + z is the Sum positive
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// if -p - z then the Sum is negitive
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assign ResultSgnTmp = InvZ&(ZSgnM)&NegSum | InvZ&PSgn&~NegSum | ((ZSgnM)&PSgn);
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assign ResultSgn = SumZero ? ZeroSgn : ResultSgnTmp;
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///////////////////////////////////////////////////////////////////////////////
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// Flags
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///////////////////////////////////////////////////////////////////////////////
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// Set Invalid flag for following cases:
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// 1) any input is a signaling NaN
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// 2) Inf - Inf (unless x or y is NaN)
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// 3) 0 * Inf
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assign MaxExp = FmtM ? {`NE{1'b1}} : 13'd255;
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assign SigNaN = XSNaNM | YSNaNM | ZSNaNM;
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assign Invalid = SigNaN | ((XInfM || YInfM) & ZInfM & (PSgn ^ ZSgnM) & ~XNaNM & ~YNaNM) | (XZeroM & YInfM) | (YZeroM & XInfM);
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// Set Overflow flag if the number is too big to be represented
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// - Don't set the overflow flag if an overflowed result isn't outputed
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assign Overflow = FullResultExp >= MaxExp & ~FullResultExp[`NE+1]&~(XNaNM|YNaNM|ZNaNM|XInfM|YInfM|ZInfM);
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// Set Underflow flag if the number is too small to be represented in normal numbers
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// - Don't set the underflow flag if the result is exact
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assign Underflow = (SumExp[`NE+1] | ((SumExp == 0) & (Round|Guard|Sticky|UfGuard)))&~(XNaNM|YNaNM|ZNaNM|XInfM|YInfM|ZInfM);
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assign UnderflowFlag = (FullResultExp[`NE+1] | ((FullResultExp == 0) | ((FullResultExp == 1) & (SumExp == 0) & ~(UfPlus1&UfLSBNormSum)))&(Round|Guard|Sticky))&~(XNaNM|YNaNM|ZNaNM|XInfM|YInfM|ZInfM);
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// Set Inexact flag if the result is diffrent from what would be outputed given infinite precision
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// - Don't set the underflow flag if an underflowed result isn't outputed
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assign Inexact = (Sticky|UfGuard|Overflow|Guard|Round|Underflow)&~(XNaNM|YNaNM|ZNaNM|XInfM|YInfM|ZInfM);
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// Combine flags
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// - FMA can't set the Divide by zero flag
|
|
// - Don't set the underflow flag if the result was rounded up to a normal number
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|
assign FMAFlgM = {Invalid, 1'b0, Overflow, UnderflowFlag, Inexact};
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// nf ne fraction and exponent bits
|
|
// nf 52 double nf is 11
|
|
// u2.2nf - product unsigned 2 int bits
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///////////////////////////////////////////////////////////////////////////////
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// Select the result
|
|
///////////////////////////////////////////////////////////////////////////////
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assign XNaNResult = FmtM ? {XSgnM, XExpM, 1'b1, XManM[`NF-2:0]} : {{32{1'b1}}, XSgnM, XExpM[7:0], 1'b1, XManM[50:29]};
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assign YNaNResult = FmtM ? {YSgnM, YExpM, 1'b1, YManM[`NF-2:0]} : {{32{1'b1}}, YSgnM, YExpM[7:0], 1'b1, YManM[50:29]};
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assign ZNaNResult = FmtM ? {ZSgnM, ZExpM, 1'b1, ZManM[`NF-2:0]} : {{32{1'b1}}, ZSgnM, ZExpM[7:0], 1'b1, ZManM[50:29]};
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assign OverflowResult = FmtM ? ((FrmM[1:0]==2'b01) | (FrmM[1:0]==2'b10&~ResultSgn) | (FrmM[1:0]==2'b11&ResultSgn)) ? {ResultSgn, {`NE-1{1'b1}}, 1'b0, {`NF{1'b1}}} :
|
|
{ResultSgn, {`NE{1'b1}}, {`NF{1'b0}}} :
|
|
((FrmM[1:0]==2'b01) | (FrmM[1:0]==2'b10&~ResultSgn) | (FrmM[1:0]==2'b11&ResultSgn)) ? {{32{1'b1}}, ResultSgn, 8'hfe, {23{1'b1}}} :
|
|
{{32{1'b1}}, ResultSgn, 8'hff, 23'b0};
|
|
assign InvalidResult = FmtM ? {ResultSgn, {`NE{1'b1}}, 1'b1, {`NF-1{1'b0}}} : {{32{1'b1}}, ResultSgn, 8'hff, 1'b1, 22'b0};
|
|
assign KillProdResult = FmtM ? {ResultSgn, {ZExpM, ZManM[`NF-1:0]} - (Minus1&AddendStickyM) + (Plus1&AddendStickyM)} : {{32{1'b1}}, ResultSgn, {ZExpM[7:0], ZManM[51:29]} - {30'b0, (Minus1&AddendStickyM)} + {30'b0, (Plus1&AddendStickyM)}};
|
|
assign UnderflowResult = FmtM ? {ResultSgn, {`FLEN-1{1'b0}}} + (CalcPlus1&(AddendStickyM|FrmM[1])) : {{32{1'b1}}, {ResultSgn, 31'b0} + {31'b0, (CalcPlus1&(AddendStickyM|FrmM[1]))}};
|
|
assign FMAResM = XNaNM ? XNaNResult :
|
|
YNaNM ? YNaNResult :
|
|
ZNaNM ? ZNaNResult :
|
|
Invalid ? InvalidResult : // has to be before inf
|
|
XInfM ? FmtM ? {PSgn, XExpM, XManM[`NF-1:0]} : {{32{1'b1}}, PSgn, XExpM[7:0], XManM[51:29]} :
|
|
YInfM ? FmtM ? {PSgn, YExpM, YManM[`NF-1:0]} : {{32{1'b1}}, PSgn, YExpM[7:0], YManM[51:29]} :
|
|
ZInfM ? FmtM ? {ZSgnM, ZExpM, ZManM[`NF-1:0]} : {{32{1'b1}}, ZSgnM, ZExpM[7:0], ZManM[51:29]} :
|
|
Overflow ? OverflowResult :
|
|
KillProdM ? KillProdResult : // has to be after Underflow
|
|
Underflow & ~ResultDenorm ? UnderflowResult :
|
|
FmtM ? {ResultSgn, ResultExp, ResultFrac} :
|
|
{{32{1'b1}}, ResultSgn, ResultExp[7:0], ResultFrac[51:29]};
|
|
|
|
// *** use NF where needed
|
|
|
|
endmodule |