10 Commits

Author	SHA1	Message	Date
Ross Thompson	a27b81ef90	Changed IMWriteDataM to IHWriteDataM.	2022-11-13 12:27:48 -06:00
Ross Thompson	40e7d2648f	Renamed signals in the LSU.	2022-09-13 11:47:39 -05:00
Ross Thompson	cd0da2e3b3	Updated the names of the *WriteDataM inside the LSU to more meaningful names. ... Moved the FWriteDataMux so that the bus and dtim both get fpu stores. Modified the PMA to disallow double sized reads when XLEN=32.	2022-08-23 10:34:39 -05:00
David Harris	e2e63ca9a8	Clean up unused signals	2022-05-12 14:49:58 +00:00
David Harris	c07b9d1722	Renamed FinalAMOWriteDataM to AMOWriteDataM	2022-04-18 01:30:03 +00:00
Ross Thompson	bfc68bef69	Fixed possible bugs in LRSC.	2022-04-16 14:45:31 -05:00
Ross Thompson	7f0c5cc847	atomic cleanup.	2022-03-10 18:56:37 -06:00
David Harris	2cea3349ad	LSU/Cache code review notes	2022-03-04 00:07:31 +00:00
Ross Thompson	5d9ad011d2	Moved mux into lsuvirtmem.	2022-02-21 09:31:29 -06:00
Ross Thompson	5fe30ff8a9	Moved atomic logic to own module.	2022-01-31 10:28:12 -06:00