David Harris
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90e7aa2d50
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csr cleanup
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2023-01-13 21:29:03 -08:00 |
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David Harris
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9526479782
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csr cleanup
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2023-01-13 21:25:55 -08:00 |
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David Harris
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25d8566694
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csr comments
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2023-01-13 20:49:34 -08:00 |
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David Harris
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b613722617
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trap comments
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2023-01-13 19:44:38 -08:00 |
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David Harris
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768c1bc703
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Header comments
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2023-01-12 04:35:44 -08:00 |
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David Harris
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8c6ddcc15b
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changed name to CORE-V-WALLY
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2023-01-11 15:15:08 -08:00 |
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David Harris
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3ea4dd4898
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Changed Wally to CORE-V Wally
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2023-01-11 14:03:44 -08:00 |
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David Harris
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739c2c8322
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Changed MIT license to Solderpad License
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2023-01-10 11:35:20 -08:00 |
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David Harris
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3b1fe78bdc
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Removed unused StallW from CSRs
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2022-12-23 00:21:36 -08:00 |
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David Harris
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0a7ed944a5
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Revert to 98b824
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2022-12-22 23:58:14 -08:00 |
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David Harris
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2d72bed1f4
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Removed unused signals in FPU and CSR
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2022-12-22 22:59:05 -08:00 |
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David Harris
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c7f3aae084
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Only delegated bits of SIP are readable
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2022-12-21 12:32:49 -08:00 |
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David Harris
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1e7401daa0
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Fixed typo in csrm
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2022-05-12 06:55:39 -07:00 |
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David Harris
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9999f69922
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Added MCONFIGPTR CSR hardwired to 0
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2022-05-12 04:31:45 +00:00 |
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David Harris
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4f1b0fdc64
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Preliminary support for big endian modes. Regression passes but no big endian tests written yet.
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2022-05-08 06:46:35 +00:00 |
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David Harris
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1a8369b02b
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Added dummy mstatus byte endianness fields tied to 0, mstatush register, removed UIE and UPIE depricated fields
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2022-04-25 14:49:00 +00:00 |
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David Harris
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142636173e
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Added MTINST hardwired to 0, and added timeout of U-mode WFI
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2022-04-24 20:00:02 +00:00 |
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Ross Thompson
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19a8df9739
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Added wave config
added new signals to ILA.
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2022-04-01 12:44:14 -05:00 |
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bbracker
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69a0f6e00b
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big interrupts refactor
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2022-03-30 13:22:41 -07:00 |
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David Harris
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d3034c4f01
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Mostly removed N_SUPPORTED
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2022-02-15 19:50:44 +00:00 |
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David Harris
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02071700d6
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Removed Busybear dependencies
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2022-02-02 20:28:21 +00:00 |
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Ross Thompson
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e2343699d1
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Factored out InstrValidNotFlushedM from each csr*.sv to csr.sv
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2022-01-20 16:39:54 -06:00 |
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Ross Thompson
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4a75e69457
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Merged in the debug ila updates.
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2022-01-18 17:29:21 -06:00 |
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Ross Thompson
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a5f773220e
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Updated CSR modules to prevent writting the registers when flushing. This only effects architecture writes not side effect writes.
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2022-01-18 17:19:33 -06:00 |
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David Harris
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120fb7863f
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Reformatted MIT license to 95 characters
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2022-01-07 12:58:40 +00:00 |
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David Harris
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c1d6550ccb
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Removed generate statements
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2022-01-05 14:35:25 +00:00 |
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David Harris
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b36ace221e
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Renamed wally-pipelined to pipelined
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2022-01-04 19:47:41 +00:00 |
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