Commit Graph

27 Commits

Author SHA1 Message Date
David Harris
90e7aa2d50 csr cleanup 2023-01-13 21:29:03 -08:00
David Harris
9526479782 csr cleanup 2023-01-13 21:25:55 -08:00
David Harris
25d8566694 csr comments 2023-01-13 20:49:34 -08:00
David Harris
b613722617 trap comments 2023-01-13 19:44:38 -08:00
David Harris
768c1bc703 Header comments 2023-01-12 04:35:44 -08:00
David Harris
8c6ddcc15b changed name to CORE-V-WALLY 2023-01-11 15:15:08 -08:00
David Harris
3ea4dd4898 Changed Wally to CORE-V Wally 2023-01-11 14:03:44 -08:00
David Harris
739c2c8322 Changed MIT license to Solderpad License 2023-01-10 11:35:20 -08:00
David Harris
3b1fe78bdc Removed unused StallW from CSRs 2022-12-23 00:21:36 -08:00
David Harris
0a7ed944a5 Revert to 98b824 2022-12-22 23:58:14 -08:00
David Harris
2d72bed1f4 Removed unused signals in FPU and CSR 2022-12-22 22:59:05 -08:00
David Harris
c7f3aae084 Only delegated bits of SIP are readable 2022-12-21 12:32:49 -08:00
David Harris
1e7401daa0 Fixed typo in csrm 2022-05-12 06:55:39 -07:00
David Harris
9999f69922 Added MCONFIGPTR CSR hardwired to 0 2022-05-12 04:31:45 +00:00
David Harris
4f1b0fdc64 Preliminary support for big endian modes. Regression passes but no big endian tests written yet. 2022-05-08 06:46:35 +00:00
David Harris
1a8369b02b Added dummy mstatus byte endianness fields tied to 0, mstatush register, removed UIE and UPIE depricated fields 2022-04-25 14:49:00 +00:00
David Harris
142636173e Added MTINST hardwired to 0, and added timeout of U-mode WFI 2022-04-24 20:00:02 +00:00
Ross Thompson
19a8df9739 Added wave config
added new signals to ILA.
2022-04-01 12:44:14 -05:00
bbracker
69a0f6e00b big interrupts refactor 2022-03-30 13:22:41 -07:00
David Harris
d3034c4f01 Mostly removed N_SUPPORTED 2022-02-15 19:50:44 +00:00
David Harris
02071700d6 Removed Busybear dependencies 2022-02-02 20:28:21 +00:00
Ross Thompson
e2343699d1 Factored out InstrValidNotFlushedM from each csr*.sv to csr.sv 2022-01-20 16:39:54 -06:00
Ross Thompson
4a75e69457 Merged in the debug ila updates. 2022-01-18 17:29:21 -06:00
Ross Thompson
a5f773220e Updated CSR modules to prevent writting the registers when flushing. This only effects architecture writes not side effect writes. 2022-01-18 17:19:33 -06:00
David Harris
120fb7863f Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
David Harris
c1d6550ccb Removed generate statements 2022-01-05 14:35:25 +00:00
David Harris
b36ace221e Renamed wally-pipelined to pipelined 2022-01-04 19:47:41 +00:00