Ross Thompson
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7d749b201b
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added support to due partial fpga simulation.
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2021-09-26 15:00:00 -05:00 |
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Ross Thompson
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3a9bc1e8c1
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Updated the fpga bios code to emulate the same behavior as qemu's bootloader and it also copies
the flash card to dram.
Fixed latch issue in the sd card reader.
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2021-09-26 13:22:23 -05:00 |
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Ross Thompson
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a213ecbdb2
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GPIO marker to indicate the sdc to dram transfer complete.
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2021-09-25 19:29:15 -05:00 |
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Ross Thompson
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c917f14b6b
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Almost done writting driver for flash card reader.
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2021-09-25 19:05:07 -05:00 |
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Ross Thompson
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69674f272a
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We now have a rough sdc read routine.
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2021-09-25 17:51:38 -05:00 |
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Ross Thompson
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23425c8d71
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Write of the SDC address register is correct. The command register is not yet working.
The root problem is the command register needs to be reset at the end of the SDC transaction.
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2021-09-24 18:48:11 -05:00 |
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Ross Thompson
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86524a5f64
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Now have software interacting with the initialization and settting the address register.
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2021-09-24 18:30:26 -05:00 |
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Ross Thompson
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44196af61a
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Have program which checks for sdc init and issues read, but read done is
not correctly being read back by the software. The error is in how the
sdc indicates busy.
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2021-09-24 15:53:38 -05:00 |
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