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23425c8d71
cvw/testsBP/fpga-test-sdc
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Ross Thompson 23425c8d71 Write of the SDC address register is correct. The command register is not yet working. 
The root problem is the command register needs to be reset at the end of the SDC transaction.
2021-09-24 18:48:11 -05:00
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test-sdc.s Write of the SDC address register is correct. The command register is not yet working. 2021-09-24 18:48:11 -05:00