6 Commits

Author	SHA1	Message	Date
Ross Thompson	7592a0dacb	Shreya and I found a bug with the exeuction of JAL and JALR instructions. The link was only set in the writeback stage. Once the branch predictor started correctly predicting JAL(R)s the ALU and forwarding logic need to have the PCLinkE at the execution stage in case an instruction in the next two clocks need the data.	2021-02-26 20:12:27 -06:00
Ross Thompson	00de91cc87	Added FlushF to hazard unit. ... Fixed some typos with the names of signals in the branch predictor. They were causing signals to be not set. Note there is a modelsim flag which prevents it from compiling if a logic is undefined. I will look this up and add it to the compiler.	2021-02-19 16:36:51 -06:00
Ross Thompson	5df7e959f3	Integrated the branch predictor into the hardward. Not yet working.	2021-02-17 22:19:17 -06:00
David Harris	d56d7a75a6	Rename ifu/dmem/ebu signals to match uarch diagram	2021-02-02 15:09:24 -05:00
David Harris	9d7e242596	Moved fpu to temporary location to fix compile and cleaned up interface formatting	2021-02-01 23:44:41 -05:00
David Harris	396cea1ea7	Reorganized src hierarchically	2021-01-30 11:50:37 -05:00