Alec Vercruysse
b52512b1ae
D$ scope-specific coverage exclusions (I$ logic that never fires)
...
The InvalidateCache signal in the D$ is for I$ only, which
causes some coverage issues that need exclusion.
Another manual exclusion is due to the fact that D$ writeback, flush,
write_line, or flush_writeback states can't be cancelled by a flush,
so those transistions are excluded.
There is some other small stuff to review (logic simplification,
or an exclusion pragma if removing the redundent logic would
make it harder to understand the code, as is the case in the
FlushAdrCntEn assign statement, in my opinion).
2023-04-19 01:34:01 -07:00
Alec Vercruysse
e3593800d9
fix unhit exclusion in fdivsqrtfsm
2023-04-19 01:34:01 -07:00
David Harris
b00b8ba366
merged coverage exclusions
2023-04-17 10:17:48 -07:00
Ross Thompson
a77d403e4c
Merge pull request #233 from AlecVercruysse/coverage3
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Full I$ coverage
2023-04-14 22:15:11 -05:00
Alec Vercruysse
862d1e0116
replace instances of code duplication for i$ exclusions w/commands
2023-04-14 17:10:39 -07:00
David Harris
cfca584bc7
Merged coverage-exclusions
2023-04-13 18:15:23 -07:00
David Harris
2e568877b0
fdivsqrtfsm coverage attempt to waive a state
2023-04-13 17:40:14 -07:00
David Harris
b378001213
Merge pull request #237 from SydRiley/main
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fctrl coverage at 100% after removing redundancies from conditionals
2023-04-13 17:10:46 -07:00
Limnanthes Serafini
1125bad9cb
Merge branch 'openhwgroup:main' into cachesim
2023-04-13 16:54:35 -07:00
Limnanthes Serafini
e33721fbe4
Merge branch 'cachesim' of https://github.com/AlecVercruysse/cvw into cachesim
2023-04-13 16:54:16 -07:00
Limnanthes Serafini
c427b4c896
Misc typo and indent fixing.
2023-04-13 16:54:15 -07:00
Sydeny
1dab409bae
Updating changes to fctrl.sv to reach 100% coverage. Excluding un-used sources of instructions for the ifu.
2023-04-13 16:27:53 -07:00
Alec Vercruysse
a52eb01407
Merge branch 'main' into coverage3
2023-04-12 16:00:15 -07:00
Alec Vercruysse
92cd0cb6ab
track GetLinenum.do (tcl procedure to find line numbers to exclude)
2023-04-12 15:58:38 -07:00
Alec Vercruysse
a3d9e11b0f
cachefsm exclude icache logic without code reuse
2023-04-12 15:57:45 -07:00
James E. Stine
dee4d49e42
Modification to testfloat.do to accept argument for nowave or by default none
2023-04-12 14:49:40 -05:00
Ross Thompson
f54868f19d
Merge pull request #229 from davidharrishmc/dev
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Turned on SVADU_SUPPORTED in rv32/64gc wally-config and in imperas.ic…
2023-04-12 12:21:03 -05:00
Alec Vercruysse
e303d99d5b
Merge branch 'main' into coverage3
2023-04-12 09:34:09 -07:00
Limnanthes Serafini
e6269b364f
Minor comments.
2023-04-12 02:57:42 -07:00
David Harris
3b6e397172
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-04-12 02:57:33 -07:00
Limnanthes Serafini
978b475269
Added performance and distribution to sim and wrapper. Added colors too!
2023-04-12 02:54:05 -07:00
Limnanthes Serafini
e0d27ff5a0
Merge branch 'openhwgroup:main' into cachesim
2023-04-12 01:34:45 -07:00
Alec Vercruysse
729f81a0df
refactor cachefsm to get full coverage
...
I had to exclude i$ states in coverage-exclusions-rv64gc.do,
but it's referred to by scope, which should be pretty robust
2023-04-12 01:15:35 -07:00
James Stine
5d1ad53bc7
Add feature in testfloat.do to elect wave or nowave
2023-04-11 22:35:04 -05:00
Limnanthes Serafini
3f7f3d6a42
Wrapper for running CacheSim on the rv64gc suites
2023-04-11 19:29:05 -07:00
David Harris
baef1249e7
Turned on SVADU_SUPPORTED in rv32/64gc wally-config and in imperas.ic. ImperasDV is happy with these privileged tests now
2023-04-10 07:05:06 -07:00
eroom1966
430763a1d1
add support into configuration for Zb(a,b,c,s)
2023-04-06 16:30:14 +01:00
eroom1966
b9ef99530a
add support for Sstc
2023-04-04 17:20:00 +01:00
David Harris
77f071dc14
Updated imperas.ic to enable B extension
2023-04-03 17:55:30 -07:00
David Harris
800fdeb7ad
Added SSTC support to imperas.ic and wallyTracer. Fixes many of the privileged tests
2023-03-31 10:54:03 -07:00
David Harris
a8661d139b
regression cleanup; unable to run buildroot coverage because of different config file
2023-03-31 09:59:38 -07:00
David Harris
0ccfdde30e
Regression update
2023-03-31 09:15:15 -07:00
David Harris
b95730e3a1
Coverage improvements in ieu, hazard units
2023-03-31 08:33:46 -07:00
Alec Vercruysse
a0aac6b15c
add tests/coverage/ tests as a target to sim/Makefile
2023-03-27 14:02:30 -07:00
David Harris
86ab90d715
Commented out setting RISCV in run-imperas-linux.sh
2023-03-27 06:34:45 -07:00
eroom1966
e65cbc6636
update to allow running of ImperasDV with linux boot
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optimize performance of the tracer
2023-03-27 09:46:16 +01:00
Lee Moore
39ac6be103
Merge branch 'openhwgroup:main' into add-linux
2023-03-27 09:44:13 +01:00
David Harris
5dfaf931e3
Avoid printing junk when running regression
2023-03-24 08:11:15 -07:00
David Harris
83e13cef46
100% IEU coverage
2023-03-23 17:25:27 -07:00
David Harris
99c471ccfe
Added csrwrites.S test case for privileged tests
2023-03-23 10:55:32 -07:00
David Harris
af55524d97
Coverage improvements
2023-03-23 09:06:05 -07:00
David Harris
3fb9d1fcd0
Merged bit manip
2023-03-23 06:55:29 -07:00
Kevin Kim
99ec5ecf27
Merge branch 'openhwgroup:main' into bit-manip
2023-03-22 15:38:11 -07:00
James Stine
fee7abbbd9
Change order of coverage and all in sim directory - order causing issue with compilation process of regression tests
2023-03-22 16:23:27 -05:00
Kip Macsai-Goren
ea87a6b856
fixed sim-wally-batch
2023-03-22 14:16:07 -07:00
Kip Macsai-Goren
1232f3a6c5
restored sim-wally-batch to existing tests
2023-03-22 13:32:24 -07:00
David Harris
c1adc09da0
Added coverage tests to regression coverage
2023-03-22 13:00:10 -07:00
Kevin Kim
605f41cd55
Merge branch 'openhwgroup:main' into bit-manip
2023-03-22 10:33:15 -07:00
eroom1966
1c3c8be148
support linux
2023-03-22 17:10:32 +00:00
David Harris
f33e3479cf
Testbench improvements for coverage reporting and running Imperas suite to raise test coverage
2023-03-22 04:34:49 -07:00
